[PATCH] D26585: [AMDGPU] Add wave barrier builtin

[Stanislav Mekhanoshin via llvm-commits]

rampitec marked 2 inline comments as done.
rampitec added inline comments.


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Comment at: lib/Target/AMDGPU/SIInstructions.td:142
+  [(int_amdgcn_wave_barrier)]> {
+  let SALU = 1;
+  let SchedRW = [WriteBarrier];
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arsenm wrote:
> I think this shouldn't be set. I think this will end up counting this as 4 bytes instead of 0
If it does not have SALU, then it is VALU, and that is what happens:

*** Bad machine code: VALU instruction does not implicitly read exec mask ***

I have added it to SIInstrInfo::getInstSizeInBytes() instead.


Repository:
  rL LLVM

https://reviews.llvm.org/D26585