[PATCH] D26648: Clarify semantic of reserved registers.

Quentin Colombet via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 14 17:26:58 PST 2016


qcolombet added a comment.

Hi Matthias,

Thanks for clarifying that. That could lead to subtle bugs :).

I miss one thing in this patch: a helper function that given a set of reserved registers adds the super registers (transitively). Then hint in the comment that TargetRegisterInfo::getReservedRegs could use such  helper.

Cheers,
-Quentin



================
Comment at: include/llvm/Target/TargetRegisterInfo.h:496
+  /// - if there are subregisters at least one of them must be reserved, the
+  ///   others may be non-reserved
   virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
----------------
Looks good to me.


Repository:
  rL LLVM

https://reviews.llvm.org/D26648





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