[PATCH] D26396: [AArch64] Enable merging of adjacent zero stores for all subtargets.

[Matthias Braun via llvm-commits]

MatzeB accepted this revision.
MatzeB added a comment.
This revision is now accepted and ready to land.

LGTM, nitpick below.

BTW: I tried to find some discussion of why we have this load/store combining feature in the AArch64 target (don't we already have that in GVN and other places in the middleend?) but couldn't find any reviews or discussions that would motivate it.



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Comment at: test/CodeGen/AArch64/arm64-narrow-st-merge.ll:1-8
+; RUN: llc < %s -mtriple aarch64--none-eabi -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=cortex-a57 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64_be--none-eabi -mcpu=cortex-a57 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=kryo -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=cyclone -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=exynos-m1 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=exynos-m2 -verify-machineinstrs | FileCheck %s
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I don't see the benefits of testing this for every CPU in the AArch64 target. Maybe 1 single RUN: is enough here?


https://reviews.llvm.org/D26396