[llvm] r286362 - [SystemZ] A few fixes in scheduler files.

Jonas Paulsson via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 9 04:47:57 PST 2016


Author: jonpa
Date: Wed Nov  9 06:47:57 2016
New Revision: 286362

URL: http://llvm.org/viewvc/llvm-project?rev=286362&view=rev
Log:
[SystemZ] A few fixes in scheduler files.

Review: U Weigand

Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td
    llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td
    llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td

Modified: llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td?rev=286362&r1=286361&r2=286362&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td Wed Nov  9 06:47:57 2016
@@ -527,7 +527,7 @@ def : InstRW<[FXa, FXb, LSU, Lat6, Group
 def : InstRW<[LSU], (instregex "(EAR|SAR|CPYA)$")>;
 
 // Load address extended
-def : InstRW<[LSU, FXa], (instregex "LAE(Y)?$")>;
+def : InstRW<[LSU, FXa, Lat5, BeginGroup], (instregex "LAE(Y)?$")>;
 
 // Load/store access multiple (not modeled precisely)
 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "(L|ST)AM(Y)?$")>;
@@ -546,10 +546,10 @@ def : InstRW<[LSU, EndGroup], (instregex
 def : InstRW<[FXa, FXa, FXb, Lat5, GroupAlone], (instregex "BAL(R)?$")>;
 
 // Test addressing mode
-def : InstRW<[FXb, EndGroup], (instregex "TAM$")>;
+def : InstRW<[FXb], (instregex "TAM$")>;
 
 // Set addressing mode
-def : InstRW<[FXb, FXb, Lat2, EndGroup], (instregex "SAM(24|31|64)$")>;
+def : InstRW<[FXb, Lat2, EndGroup], (instregex "SAM(24|31|64)$")>;
 
 // Branch (and save) and set mode.
 def : InstRW<[FXa, FXb, Lat2, GroupAlone], (instregex "BSM$")>;

Modified: llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td?rev=286362&r1=286361&r2=286362&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td Wed Nov  9 06:47:57 2016
@@ -504,7 +504,7 @@ def : InstRW<[FXU, LSU, FXU, Lat6, Group
 def : InstRW<[LSU], (instregex "(EAR|SAR|CPYA)$")>;
 
 // Load address extended
-def : InstRW<[LSU, FXU], (instregex "LAE(Y)?$")>;
+def : InstRW<[LSU, FXU, Lat5, GroupAlone], (instregex "LAE(Y)?$")>;
 
 // Load/store access multiple (not modeled precisely)
 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "(L|ST)AM(Y)?$")>;
@@ -523,14 +523,14 @@ def : InstRW<[LSU, EndGroup], (instregex
 def : InstRW<[FXU, FXU, LSU, Lat8, GroupAlone], (instregex "BAL(R)?$")>;
 
 // Test addressing mode
-def : InstRW<[FXU, EndGroup], (instregex "TAM$")>;
+def : InstRW<[FXU], (instregex "TAM$")>;
 
 // Set addressing mode
 def : InstRW<[LSU, EndGroup], (instregex "SAM(24|31|64)$")>;
 
 // Branch (and save) and set mode.
-def : InstRW<[FXU, LSU, Lat4, GroupAlone], (instregex "BSM$")>;
-def : InstRW<[FXU, FXU, LSU, Lat5, GroupAlone], (instregex "BASSM$")>;
+def : InstRW<[FXU, LSU, Lat5, GroupAlone], (instregex "BSM$")>;
+def : InstRW<[FXU, FXU, LSU, Lat6, GroupAlone], (instregex "BASSM$")>;
 
 //===----------------------------------------------------------------------===//
 // Miscellaneous Instructions.

Modified: llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td?rev=286362&r1=286361&r2=286362&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td Wed Nov  9 06:47:57 2016
@@ -506,7 +506,7 @@ def : InstRW<[FXU, FXU, LSU, Lat6, Group
 def : InstRW<[LSU], (instregex "(EAR|SAR|CPYA)$")>;
 
 // Load address extended
-def : InstRW<[LSU, FXU], (instregex "LAE(Y)?$")>;
+def : InstRW<[LSU, FXU, Lat5, GroupAlone], (instregex "LAE(Y)?$")>;
 
 // Load/store access multiple (not modeled precisely)
 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "(L|ST)AM(Y)?$")>;
@@ -525,14 +525,14 @@ def : InstRW<[LSU, EndGroup], (instregex
 def : InstRW<[FXU, FXU, LSU, Lat8, GroupAlone], (instregex "BAL(R)?$")>;
 
 // Test addressing mode
-def : InstRW<[FXU, EndGroup], (instregex "TAM$")>;
+def : InstRW<[FXU], (instregex "TAM$")>;
 
 // Set addressing mode
 def : InstRW<[LSU, EndGroup], (instregex "SAM(24|31|64)$")>;
 
 // Branch (and save) and set mode.
-def : InstRW<[FXU, LSU, Lat4, GroupAlone], (instregex "BSM$")>;
-def : InstRW<[FXU, FXU, LSU, Lat5, GroupAlone], (instregex "BASSM$")>;
+def : InstRW<[FXU, LSU, Lat5, GroupAlone], (instregex "BSM$")>;
+def : InstRW<[FXU, FXU, LSU, Lat6, GroupAlone], (instregex "BASSM$")>;
 
 //===----------------------------------------------------------------------===//
 // Transactional execution




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