[PATCH] D25692: [AVX-512] Disassembler support for rounding control and SAE attribute.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 8 21:57:04 PST 2016

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craig.topper added a comment.

I agree with Elena, we should use the other flags to ignore the vector size in the disassembler table generation. This is what we already do in the encoder. Let's keep the intention of the L and L2 bits in TSFlags as they are.


https://reviews.llvm.org/D25692

Previous message: [llvm] r286343 - [AVX-512] Add more varied alignments to tests for storing the lower 128-bits of a 256 or 512-bit subvector extract.
Next message: [llvm] r286344 - [X86] Lower AVX512 and SSE intrinsics for CVTTPD2DQ to X86ISD::CVTTPD2DQ.
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