[PATCH] D26398: [mips][msa] Implement f16 support

[Simon Dardis via llvm-commits]

sdardis created this revision.
sdardis added a reviewer: vkalintiris.
sdardis added a subscriber: llvm-commits.
sdardis set the repository for this revision to rL LLVM.

The MIPS MSA ASE provides instructions to convert to and from half precision
floating point. This patch teaches the MIPS backend to treat f16 as a legal
type and how to promote such values to f32 for the usual set of operations.

As a result of this, the fexup[lr].w intrinsics no longer crash LLVM during
type legalization.


Repository:
  rL LLVM

https://reviews.llvm.org/D26398

Files:
  lib/Target/Mips/MipsMSAInstrInfo.td
  lib/Target/Mips/MipsRegisterInfo.td
  lib/Target/Mips/MipsSEISelLowering.cpp
  lib/Target/Mips/MipsSEISelLowering.h
  test/CodeGen/Mips/msa/f16-llvm-ir.ll
  test/CodeGen/Mips/msa/fexuprl.ll

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