[PATCH] D26313: [AArch64] Transfer memory operands when lowering vector load and store intrinsics

[James Molloy via llvm-commits]

jmolloy requested changes to this revision.
jmolloy added a comment.
This revision now requires changes to proceed.

Hi,

Thanks for this! One comment, and please upload patches with full context.

Cheers,

James



================
Comment at: lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:1160
+  MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1);
+  MemOp[0] = cast<MemIntrinsicSDNode>(N)->getMemOperand();
+  cast<MachineSDNode>(Ld)->setMemRefs(MemOp, MemOp + 1);
----------------
This seems dodgy to me. Can we really be sure at this point that the memoperand is an intrinsic? It seems like we'd probably want the weaker "MemSDNode"?


https://reviews.llvm.org/D26313