[llvm] r285693 - [InstCombine] auto-generate better checks

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Tue Nov  1 09:38:30 2016
New Revision: 285693

URL: http://llvm.org/viewvc/llvm-project?rev=285693&view=rev
Log:
[InstCombine] auto-generate better checks

Modified:
    llvm/trunk/test/Transforms/InstCombine/adjust-for-sminmax.ll

Modified: llvm/trunk/test/Transforms/InstCombine/adjust-for-sminmax.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/adjust-for-sminmax.ll?rev=285693&r1=285692&r2=285693&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/adjust-for-sminmax.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/adjust-for-sminmax.ll Tue Nov  1 09:38:30 2016
@@ -1,84 +1,180 @@
-; RUN: opt < %s -instcombine -S | grep "icmp s[lg]t i32 %n, 0" | count 16
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
 
 ; Instcombine should recognize that this code can be adjusted
 ; to fit the canonical smax/smin pattern.
 
 define i32 @floor_a(i32 %n) {
+; CHECK-LABEL: @floor_a(
+; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sgt i32 %n, -1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @ceil_a(i32 %n) {
+; CHECK-LABEL: @ceil_a(
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp slt i32 %n, 1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @floor_b(i32 %n) {
+; CHECK-LABEL: @floor_b(
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sgt i32 %n, 0
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @ceil_b(i32 %n) {
+; CHECK-LABEL: @ceil_b(
+; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp slt i32 %n, 0
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @floor_c(i32 %n) {
+; CHECK-LABEL: @floor_c(
+; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sge i32 %n, 0
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @ceil_c(i32 %n) {
+; CHECK-LABEL: @ceil_c(
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sle i32 %n, 0
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @floor_d(i32 %n) {
+; CHECK-LABEL: @floor_d(
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sge i32 %n, 1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @ceil_d(i32 %n) {
+; CHECK-LABEL: @ceil_d(
+; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sle i32 %n, -1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @floor_e(i32 %n) {
+; CHECK-LABEL: @floor_e(
+; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sgt i32 %n, -1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @ceil_e(i32 %n) {
+; CHECK-LABEL: @ceil_e(
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp slt i32 %n, 1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @floor_f(i32 %n) {
+; CHECK-LABEL: @floor_f(
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sgt i32 %n, 0
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @ceil_f(i32 %n) {
+; CHECK-LABEL: @ceil_f(
+; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp slt i32 %n, 0
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @floor_g(i32 %n) {
+; CHECK-LABEL: @floor_g(
+; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sge i32 %n, 0
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @ceil_g(i32 %n) {
+; CHECK-LABEL: @ceil_g(
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sle i32 %n, 0
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @floor_h(i32 %n) {
+; CHECK-LABEL: @floor_h(
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sge i32 %n, 1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
+
 define i32 @ceil_h(i32 %n) {
+; CHECK-LABEL: @ceil_h(
+; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
+; CHECK-NEXT:    ret i32 [[M]]
+;
   %t = icmp sle i32 %n, -1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m