[llvm] r285467 - SDAG: Make sure we use an allocatable reg class when we create this vreg

Justin Bogner via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 28 15:42:55 PDT 2016

Author: bogner
Date: Fri Oct 28 17:42:54 2016
New Revision: 285467

URL: http://llvm.org/viewvc/llvm-project?rev=285467&view=rev
SDAG: Make sure we use an allocatable reg class when we create this vreg

As per the discussion on r280783, if constrainRegClass fails we need
to call getAllocatableClass like we did before that commit.


Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=285467&r1=285466&r2=285467&view=diff
--- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Fri Oct 28 17:42:54 2016
@@ -338,6 +338,8 @@ InstrEmitter::AddRegisterOperand(Machine
       const TargetRegisterClass *ConstrainedRC
         = MRI->constrainRegClass(VReg, OpRC, MinRCSize);
       if (!ConstrainedRC) {
+        OpRC = TRI->getAllocatableClass(OpRC);
+        assert(OpRC && "Constraints cannot be fulfilled for allocation");
         unsigned NewVReg = MRI->createVirtualRegister(OpRC);
         BuildMI(*MBB, InsertPos, Op.getNode()->getDebugLoc(),
                 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg);

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