[PATCH] D25722: Improved cost model for FDIV and FSQRT
Michael Kuperstein via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 25 11:17:10 PDT 2016
mkuper added a comment.
In https://reviews.llvm.org/D25722#578712, @RKSimon wrote:
> In https://reviews.llvm.org/D25722#578664, @mkuper wrote:
> > I'd really like to understand the discrepancy between Agner's numbers and the IACA numbers - especially since IACA does give the expected number for the latency.
> > Andrew, any chance you could ping the IACA people at Intel and ask them about this?
> IACA doesn't have that great support these days - the website says development has been suspended, although they have announced they will do a BDW/SKL bugfix release at some point. Similar comments about dodgy costs don't seem to be answered.
To the best of my knowledge, Andrew works for Intel, so he may have a better chance of getting an answer. :-)
As to support - the website has a comment from July that states that "[they] are resuming support for Intel(R) Architecture Code Analyzer with BDW and SKL support probably before end of 2016".
So, one can hope...
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