[PATCH] D17260: SystemZ scheduling implementation

Ulrich Weigand via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 19 02:18:29 PDT 2016


uweigand added a comment.

In https://reviews.llvm.org/D17260#573190, @atrick wrote:

> The scheduling class is on the MCInstrDesc. AFAIK, there's no abstract way to tie your aliasing pseudo instruction's MCInstrDesc to their lowered instruction's MCInstrDesc. You can try to factor instruction records in the InstrInfo.td file itself by using a SchedRW field, but that's not the way you've structured things. I think the only reasonable thing to do here is duplicate the InstRW records. You've basically told CodeGen that these are two distinct MC instrs.

Yes, it look like this is what we'll have to do.  But I guess that's fine, we don't have all that many of those aliases anyway.


https://reviews.llvm.org/D17260





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