[llvm] r284522 - [Hexagon] Handle block live-ins with lane masks in HexagonBlockRanges

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Tue Oct 18 14:47:20 2016
New Revision: 284522

URL: http://llvm.org/viewvc/llvm-project?rev=284522&view=rev
Log:
[Hexagon] Handle block live-ins with lane masks in HexagonBlockRanges

Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonBlockRanges.cpp
    llvm/trunk/lib/Target/Hexagon/HexagonBlockRanges.h

Modified: llvm/trunk/lib/Target/Hexagon/HexagonBlockRanges.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonBlockRanges.cpp?rev=284522&r1=284521&r2=284522&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonBlockRanges.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonBlockRanges.cpp Tue Oct 18 14:47:20 2016
@@ -241,11 +241,29 @@ HexagonBlockRanges::HexagonBlockRanges(M
 
 
 HexagonBlockRanges::RegisterSet HexagonBlockRanges::getLiveIns(
-      const MachineBasicBlock &B) {
+      const MachineBasicBlock &B, const MachineRegisterInfo &MRI,
+      const TargetRegisterInfo &TRI) {
   RegisterSet LiveIns;
-  for (auto I : B.liveins())
-    if (!Reserved[I.PhysReg])
-      LiveIns.insert({I.PhysReg, 0});
+  RegisterSet Tmp;
+  for (auto I : B.liveins()) {
+    if (I.LaneMask == ~LaneBitmask(0)) {
+      Tmp.insert({I.PhysReg,0});
+      continue;
+    }
+    for (MCSubRegIndexIterator S(I.PhysReg, &TRI); S.isValid(); ++S) {
+      LaneBitmask M = TRI.getSubRegIndexLaneMask(S.getSubRegIndex());
+      if (M & I.LaneMask)
+        Tmp.insert({S.getSubReg(), 0});
+    }
+  }
+
+  for (auto R : Tmp) {
+    if (!Reserved[R.Reg])
+      LiveIns.insert(R);
+    for (auto S : expandToSubRegs(R, MRI, TRI))
+      if (!Reserved[S.Reg])
+        LiveIns.insert(S);
+  }
   return LiveIns;
 }
 
@@ -287,9 +305,8 @@ void HexagonBlockRanges::computeInitialL
   MachineBasicBlock &B = IndexMap.getBlock();
   MachineRegisterInfo &MRI = B.getParent()->getRegInfo();
 
-  for (auto R : getLiveIns(B))
-    for (auto S : expandToSubRegs(R, MRI, TRI))
-      LiveOnEntry.insert(S);
+  for (auto R : getLiveIns(B, MRI, TRI))
+    LiveOnEntry.insert(R);
 
   for (auto R : LiveOnEntry)
     LastDef[R] = IndexType::Entry;
@@ -340,9 +357,8 @@ void HexagonBlockRanges::computeInitialL
   // Collect live-on-exit.
   RegisterSet LiveOnExit;
   for (auto *SB : B.successors())
-    for (auto R : getLiveIns(*SB))
-      for (auto S : expandToSubRegs(R, MRI, TRI))
-        LiveOnExit.insert(S);
+    for (auto R : getLiveIns(*SB, MRI, TRI))
+      LiveOnExit.insert(R);
 
   for (auto R : LiveOnExit)
     LastUse[R] = IndexType::Exit;

Modified: llvm/trunk/lib/Target/Hexagon/HexagonBlockRanges.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonBlockRanges.h?rev=284522&r1=284521&r2=284522&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonBlockRanges.h (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonBlockRanges.h Tue Oct 18 14:47:20 2016
@@ -150,7 +150,8 @@ struct HexagonBlockRanges {
   };
 
 private:
-  RegisterSet getLiveIns(const MachineBasicBlock &B);
+  RegisterSet getLiveIns(const MachineBasicBlock &B,
+      const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI);
 
   void computeInitialLiveRanges(InstrIndexMap &IndexMap,
       RegToRangeMap &LiveMap);