[llvm] r284395 - [DAG] optimize away an arithmetic-right-shift of a 0 or -1 value

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 17 08:58:29 PDT 2016


Author: spatel
Date: Mon Oct 17 10:58:28 2016
New Revision: 284395

URL: http://llvm.org/viewvc/llvm-project?rev=284395&view=rev
Log:
[DAG] optimize away an arithmetic-right-shift of a 0 or -1 value

This came up as part of:
https://reviews.llvm.org/D25485

Note that the vector case is missed because ComputeNumSignBits() is deficient for vectors.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/sar_fold64.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=284395&r1=284394&r2=284395&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Oct 17 10:58:28 2016
@@ -4740,6 +4740,10 @@ SDValue DAGCombiner::visitSRA(SDNode *N)
   EVT VT = N0.getValueType();
   unsigned OpSizeInBits = VT.getScalarSizeInBits();
 
+  // Arithmetic shifting an all-sign-bit value is a no-op.
+  if (DAG.ComputeNumSignBits(N0) == OpSizeInBits)
+    return N0;
+
   // fold vector ops
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   if (VT.isVector()) {

Modified: llvm/trunk/test/CodeGen/X86/sar_fold64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sar_fold64.ll?rev=284395&r1=284394&r2=284395&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sar_fold64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sar_fold64.ll Mon Oct 17 10:58:28 2016
@@ -57,14 +57,11 @@ define i32 @shl56sar57(i64 %a) #0 {
   ret i32 %3
 }
 
-; FIXME
-
 define i8 @all_sign_bit_ashr(i8 %x) {
 ; CHECK-LABEL: all_sign_bit_ashr:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    andb $1, %dil
 ; CHECK-NEXT:    negb %dil
-; CHECK-NEXT:    sarb $6, %dil
 ; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
 ;




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