[llvm] r284365 - [X86] Fix shuffle decoding assertions to print the right number of required operands. Update the checks themselves to be >= to the same number instead of > one less than the required number.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Mon Oct 17 01:41:18 2016
New Revision: 284365

URL: http://llvm.org/viewvc/llvm-project?rev=284365&view=rev
Log:
[X86] Fix shuffle decoding assertions to print the right number of required operands. Update the checks themselves to be >= to the same number instead of > one less than the required number.

Modified:
    llvm/trunk/lib/Target/X86/X86MCInstLower.cpp

Modified: llvm/trunk/lib/Target/X86/X86MCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCInstLower.cpp?rev=284365&r1=284364&r2=284365&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86MCInstLower.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86MCInstLower.cpp Mon Oct 17 01:41:18 2016
@@ -1534,8 +1534,8 @@ void X86AsmPrinter::EmitInstruction(cons
   case X86::VPERMILPDZrm: {
     if (!OutStreamer->isVerboseAsm())
       break;
-    assert(MI->getNumOperands() > 5 &&
-           "We should always have at least 5 operands!");
+    assert(MI->getNumOperands() >= 6 &&
+           "We should always have at least 6 operands!");
     const MachineOperand &DstOp = MI->getOperand(0);
     const MachineOperand &SrcOp = MI->getOperand(1);
     const MachineOperand &MaskOp = MI->getOperand(5);
@@ -1556,8 +1556,8 @@ void X86AsmPrinter::EmitInstruction(cons
   case X86::VPERMILPSZrm: {
     if (!OutStreamer->isVerboseAsm())
       break;
-    assert(MI->getNumOperands() > 5 &&
-           "We should always have at least 5 operands!");
+    assert(MI->getNumOperands() >= 6 &&
+           "We should always have at least 6 operands!");
     const MachineOperand &DstOp = MI->getOperand(0);
     const MachineOperand &SrcOp = MI->getOperand(1);
     const MachineOperand &MaskOp = MI->getOperand(5);
@@ -1577,8 +1577,8 @@ void X86AsmPrinter::EmitInstruction(cons
   case X86::VPERMIL2PSrmY: {
     if (!OutStreamer->isVerboseAsm())
       break;
-    assert(MI->getNumOperands() > 7 &&
-      "We should always have at least 7 operands!");
+    assert(MI->getNumOperands() >= 8 &&
+           "We should always have at least 8 operands!");
     const MachineOperand &DstOp = MI->getOperand(0);
     const MachineOperand &SrcOp1 = MI->getOperand(1);
     const MachineOperand &SrcOp2 = MI->getOperand(2);
@@ -1607,8 +1607,8 @@ void X86AsmPrinter::EmitInstruction(cons
   case X86::VPPERMrrm: {
     if (!OutStreamer->isVerboseAsm())
       break;
-    assert(MI->getNumOperands() > 6 &&
-           "We should always have at least 6 operands!");
+    assert(MI->getNumOperands() >= 7 &&
+           "We should always have at least 7 operands!");
     const MachineOperand &DstOp = MI->getOperand(0);
     const MachineOperand &SrcOp1 = MI->getOperand(1);
     const MachineOperand &SrcOp2 = MI->getOperand(2);