[PATCH] D25650: [AVX-512] Add support for turning a 256-bit load that goes to both halfs of an insert_subvector into a subvector broadcast.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sun Oct 16 04:41:14 PDT 2016


RKSimon added a comment.

Thanks for looking at this, as a future patch would it make sense to move this code into EltsFromConsecutiveLoads?

I've also wondered whether we should make X86ISD::SUBV_BROADCAST a memory intrinsic? I realise that AVX512 has at least partial reg-reg instruction support that would require handling by another approach.



================
Comment at: lib/Target/X86/X86ISelLowering.cpp:12998
   //                   (load addr), Elts/2)
   // --> X86SubVBroadcast(load16 addr)
+  // Similar for 32-byte subvector into a 64-byte vector.
----------------
Update the comment?


https://reviews.llvm.org/D25650





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