[PATCH] D25618: Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.

Daniel Sanders via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 14 07:27:05 PDT 2016


dsanders added inline comments.


================
Comment at: lib/Target/AMDGPU/VOP1Instructions.td:539
   let VOP1 = 1;
+  let SubtargetPredicate = isGCN;
 }
----------------
@tstellarAMD: Hi Tom, I'm not sure if this line is correct or not. I've included it because a recent change (r284031) left a '?' in this field and that causes problems in tablegen. Is there a correct predicate to use here?


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Comment at: utils/TableGen/CodeEmitterGen.cpp:332
+    << "    const MCInst &Inst, uint64_t AvailableFeatures) const {\n"
+    << "  static uint64_t RequiredFeatures[] = {\n";
+  unsigned InstIdx = 0;
----------------
I've just noticed I've forgotten something. I intended for the body of this generated function to be guarded with '#ifndef NDEBUG' so that it isn't checked on release builds. I'll post an updated patch soon


https://reviews.llvm.org/D25618





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