[llvm] r284191 - [Support/ELF/AMDGPU] Add 32-bit lo/hi got and pc relative relocations
Konstantin Zhuravlyov via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 13 21:03:49 PDT 2016
Author: kzhuravl
Date: Thu Oct 13 23:03:49 2016
New Revision: 284191
URL: http://llvm.org/viewvc/llvm-project?rev=284191&view=rev
Log:
[Support/ELF/AMDGPU] Add 32-bit lo/hi got and pc relative relocations
Added relocation names:
- R_AMDGPU_GOTPCREL32_LO
- R_AMDGPU_GOTPCREL32_HI
- R_AMDGPU_REL32_LO
- R_AMDGPU_REL32_HI
AMDGPU isa only supports 32-bit immediates. In order to access 64-bit address we need to generate 32-bit lo/hi relocations, and do the right math (separate patch). Currently we only generate one 32 bit relocation for lower bits for each access, losing higher bits. Hence we need relocations listed above.
Differential Revision: https://reviews.llvm.org/D25546
Modified:
llvm/trunk/docs/CodeGenerator.rst
llvm/trunk/include/llvm/Support/ELFRelocs/AMDGPU.def
llvm/trunk/test/Object/AMDGPU/elf64-relocs.yaml
Modified: llvm/trunk/docs/CodeGenerator.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodeGenerator.rst?rev=284191&r1=284190&r2=284191&view=diff
==============================================================================
--- llvm/trunk/docs/CodeGenerator.rst (original)
+++ llvm/trunk/docs/CodeGenerator.rst Thu Oct 13 23:03:49 2016
@@ -2682,15 +2682,19 @@ Following notations are used for specify
AMDGPU Backend generates *Elf64_Rela* relocation records with the following
supported relocation types:
- ===================== ===== ========== ====================
- Relocation type Value Field Calculation
- ===================== ===== ========== ====================
- ``R_AMDGPU_NONE`` 0 ``none`` ``none``
- ``R_AMDGPU_ABS32_LO`` 1 ``word32`` (S + A) & 0xFFFFFFFF
- ``R_AMDGPU_ABS32_HI`` 2 ``word32`` (S + A) >> 32
- ``R_AMDGPU_ABS64`` 3 ``word64`` S + A
- ``R_AMDGPU_REL32`` 4 ``word32`` S + A - P
- ``R_AMDGPU_REL64`` 5 ``word64`` S + A - P
- ``R_AMDGPU_ABS32`` 6 ``word32`` S + A
- ``R_AMDGPU_GOTPCREL`` 7 ``word32`` G + GOT + A - P
- ===================== ===== ========== ====================
+ ========================== ===== ========== ==============================
+ Relocation type Value Field Calculation
+ ========================== ===== ========== ==============================
+ ``R_AMDGPU_NONE`` 0 ``none`` ``none``
+ ``R_AMDGPU_ABS32_LO`` 1 ``word32`` (S + A) & 0xFFFFFFFF
+ ``R_AMDGPU_ABS32_HI`` 2 ``word32`` (S + A) >> 32
+ ``R_AMDGPU_ABS64`` 3 ``word64`` S + A
+ ``R_AMDGPU_REL32`` 4 ``word32`` S + A - P
+ ``R_AMDGPU_REL64`` 5 ``word64`` S + A - P
+ ``R_AMDGPU_ABS32`` 6 ``word32`` S + A
+ ``R_AMDGPU_GOTPCREL`` 7 ``word32`` G + GOT + A - P
+ ``R_AMDGPU_GOTPCREL32_LO`` 8 ``word32`` (G + GOT + A - P) & 0xFFFFFFFF
+ ``R_AMDGPU_GOTPCREL32_HI`` 9 ``word32`` (G + GOT + A - P) >> 32
+ ``R_AMDGPU_REL32_LO`` 10 ``word32`` (S + A - P) & 0xFFFFFFFF
+ ``R_AMDGPU_REL32_HI`` 11 ``word32`` (S + A - P) >> 32
+ ========================== ===== ========== ==============================
Modified: llvm/trunk/include/llvm/Support/ELFRelocs/AMDGPU.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ELFRelocs/AMDGPU.def?rev=284191&r1=284190&r2=284191&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/ELFRelocs/AMDGPU.def (original)
+++ llvm/trunk/include/llvm/Support/ELFRelocs/AMDGPU.def Thu Oct 13 23:03:49 2016
@@ -2,11 +2,15 @@
#error "ELF_RELOC must be defined"
#endif
-ELF_RELOC(R_AMDGPU_NONE, 0)
-ELF_RELOC(R_AMDGPU_ABS32_LO, 1)
-ELF_RELOC(R_AMDGPU_ABS32_HI, 2)
-ELF_RELOC(R_AMDGPU_ABS64, 3)
-ELF_RELOC(R_AMDGPU_REL32, 4)
-ELF_RELOC(R_AMDGPU_REL64, 5)
-ELF_RELOC(R_AMDGPU_ABS32, 6)
-ELF_RELOC(R_AMDGPU_GOTPCREL, 7)
+ELF_RELOC(R_AMDGPU_NONE, 0)
+ELF_RELOC(R_AMDGPU_ABS32_LO, 1)
+ELF_RELOC(R_AMDGPU_ABS32_HI, 2)
+ELF_RELOC(R_AMDGPU_ABS64, 3)
+ELF_RELOC(R_AMDGPU_REL32, 4)
+ELF_RELOC(R_AMDGPU_REL64, 5)
+ELF_RELOC(R_AMDGPU_ABS32, 6)
+ELF_RELOC(R_AMDGPU_GOTPCREL, 7)
+ELF_RELOC(R_AMDGPU_GOTPCREL32_LO, 8)
+ELF_RELOC(R_AMDGPU_GOTPCREL32_HI, 9)
+ELF_RELOC(R_AMDGPU_REL32_LO, 10)
+ELF_RELOC(R_AMDGPU_REL32_HI, 11)
Modified: llvm/trunk/test/Object/AMDGPU/elf64-relocs.yaml
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Object/AMDGPU/elf64-relocs.yaml?rev=284191&r1=284190&r2=284191&view=diff
==============================================================================
--- llvm/trunk/test/Object/AMDGPU/elf64-relocs.yaml (original)
+++ llvm/trunk/test/Object/AMDGPU/elf64-relocs.yaml Thu Oct 13 23:03:49 2016
@@ -3,13 +3,18 @@
# CHECK: Relocations [
# CHECK: Section (2) .rela.text {
-# CHECK: 0x0 R_AMDGPU_NONE main 0x0
-# CHECK: 0x8 R_AMDGPU_ABS32_LO - 0x0
-# CHECK: 0x10 R_AMDGPU_ABS32_HI - 0x0
-# CHECK: 0x18 R_AMDGPU_ABS64 - 0x0
-# CHECK: 0x20 R_AMDGPU_REL32 - 0x0
-# CHECK: 0x28 R_AMDGPU_REL64 - 0x0
-# CHECK: 0x30 R_AMDGPU_ABS32 - 0x0
+# CHECK: 0x0 R_AMDGPU_NONE - 0x0
+# CHECK: 0x2 R_AMDGPU_ABS32_LO - 0x0
+# CHECK: 0x4 R_AMDGPU_ABS32_HI - 0x0
+# CHECK: 0x6 R_AMDGPU_ABS64 - 0x0
+# CHECK: 0x8 R_AMDGPU_REL32 - 0x0
+# CHECK: 0x10 R_AMDGPU_REL64 - 0x0
+# CHECK: 0x12 R_AMDGPU_ABS32 - 0x0
+# CHECK: 0x14 R_AMDGPU_GOTPCREL - 0x0
+# CHECK: 0x16 R_AMDGPU_GOTPCREL32_LO - 0x0
+# CHECK: 0x18 R_AMDGPU_GOTPCREL32_HI - 0x0
+# CHECK: 0x20 R_AMDGPU_REL32_LO - 0x0
+# CHECK: 0x22 R_AMDGPU_REL32_HI - 0x0
# CHECK: }
# CHECK: ]
@@ -32,26 +37,41 @@ Sections:
AddressAlign: 0x08
Relocations:
- Offset: 0x0
- Symbol: main
+ Symbol: s0
Type: R_AMDGPU_NONE
- - Offset: 0x8
- Symbol: a
+ - Offset: 0x2
+ Symbol: s1
Type: R_AMDGPU_ABS32_LO
- - Offset: 0x10
- Symbol: b
+ - Offset: 0x4
+ Symbol: s2
Type: R_AMDGPU_ABS32_HI
- - Offset: 0x18
- Symbol: c
+ - Offset: 0x6
+ Symbol: s3
Type: R_AMDGPU_ABS64
- - Offset: 0x20
- Symbol: d
+ - Offset: 0x8
+ Symbol: s4
Type: R_AMDGPU_REL32
- - Offset: 0x28
- Symbol: e
+ - Offset: 0x10
+ Symbol: s5
Type: R_AMDGPU_REL64
- - Offset: 0x30
- Symbol: f
+ - Offset: 0x12
+ Symbol: s6
Type: R_AMDGPU_ABS32
+ - Offset: 0x14
+ Symbol: s7
+ Type: R_AMDGPU_GOTPCREL
+ - Offset: 0x16
+ Symbol: s8
+ Type: R_AMDGPU_GOTPCREL32_LO
+ - Offset: 0x18
+ Symbol: s9
+ Type: R_AMDGPU_GOTPCREL32_HI
+ - Offset: 0x20
+ Symbol: s10
+ Type: R_AMDGPU_REL32_LO
+ - Offset: 0x22
+ Symbol: s11
+ Type: R_AMDGPU_REL32_HI
Symbols:
Local:
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