[PATCH] D24681: Optimize patterns of vectorized interleaved memory accesses for X86.

[Michael Kuperstein via llvm-commits]

mkuper accepted this revision.
mkuper added a comment.

LGTM



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Comment at: test/Transforms/InterleavedAccess/X86/interleaved-accesses-64bits-avx.ll:5
+
+; CHECK: %10 = shufflevector <4 x double> %3, <4 x double> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+; CHECK-NEXT:  %11 = shufflevector <4 x double> %5, <4 x double> %9, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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Probably a good idea to generate this test with the update script - we want to see the loads, not rely on the numbered IR values, etc.


https://reviews.llvm.org/D24681