[llvm] r283970 - [AArch64][MachineLegalizer] Mark more bitcasts as legal.

Quentin Colombet via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 11 20:57:44 PDT 2016


Author: qcolombet
Date: Tue Oct 11 22:57:43 2016
New Revision: 283970

URL: http://llvm.org/viewvc/llvm-project?rev=283970&view=rev
Log:
[AArch64][MachineLegalizer] Mark more bitcasts as legal.

Those are copies, we do not have to do any legalization action for them.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir

Modified: llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp?rev=283970&r1=283969&r2=283970&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp Tue Oct 11 22:57:43 2016
@@ -176,6 +176,7 @@ AArch64MachineLegalizer::AArch64MachineL
   setAction({G_INTTOPTR, 0, p0}, Legal);
   setAction({G_INTTOPTR, 1, s64}, Legal);
 
+  // Casts for 32 and 64-bit width type are just copies.
   for (auto Ty : {s1, s8, s16, s32, s64}) {
     setAction({G_BITCAST, 0, Ty}, Legal);
     setAction({G_BITCAST, 1, Ty}, Legal);
@@ -183,10 +184,12 @@ AArch64MachineLegalizer::AArch64MachineL
 
   for (int EltSize = 8; EltSize <= 64; EltSize *= 2) {
     setAction({G_BITCAST, 0, LLT::vector(128/EltSize, EltSize)}, Legal);
+    setAction({G_BITCAST, 1, LLT::vector(128/EltSize, EltSize)}, Legal);
     if (EltSize == 64)
       continue;
 
     setAction({G_BITCAST, 0, LLT::vector(64/EltSize, EltSize)}, Legal);
+    setAction({G_BITCAST, 1, LLT::vector(64/EltSize, EltSize)}, Legal);
   }
 
   computeTables();

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir?rev=283970&r1=283969&r2=283970&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir Tue Oct 11 22:57:43 2016
@@ -44,6 +44,9 @@ registers:
   - { id: 27, class: _ }
   - { id: 28, class: _ }
   - { id: 29, class: _ }
+  - { id: 30, class: _ }
+  - { id: 31, class: _ }
+  - { id: 32, class: _ }
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
@@ -117,4 +120,11 @@ body: |
     %27(s16) = G_SELECT %10, %12, %7
     %28(s32) = G_SELECT %10, %15, %16
     %29(s64) = G_SELECT %10, %9, %24
+
+    ; CHECK: %30(<2 x s32>) = G_BITCAST %9
+    ; CHECK: %31(s64) = G_BITCAST %30
+    ; CHECK: %32(s32) = G_BITCAST %15
+    %30(<2 x s32>) = G_BITCAST %9
+    %31(s64) = G_BITCAST %30
+    %32(s32) = G_BITCAST %15
 ...




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