[llvm] r283936 - MIRParser: allow types on registers with a RegBank.

[Tim Northover via llvm-commits]

Author: tnorthover
Date: Tue Oct 11 15:50:04 2016
New Revision: 283936

URL: http://llvm.org/viewvc/llvm-project?rev=283936&view=rev
Log:
MIRParser: allow types on registers with a RegBank.

This fixes some GlobalISel regression tests.

Modified:
    llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp

Modified: llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp?rev=283936&r1=283935&r2=283936&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp Tue Oct 11 15:50:04 2016
@@ -990,7 +990,8 @@ bool MIParser::parseRegisterOperand(Mach
     // Virtual registers may have a size with GlobalISel.
     if (!TargetRegisterInfo::isVirtualRegister(Reg))
       return error("unexpected size on physical register");
-    if (RegInfo->Kind != VRegInfo::GENERIC)
+    if (RegInfo->Kind != VRegInfo::GENERIC &&
+        RegInfo->Kind != VRegInfo::REGBANK)
       return error("unexpected size on non-generic virtual register");
 
     LLT Ty;