[llvm] r283437 - AMDGPU: Partially fix reported code size for some instructions

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Thu Oct  6 05:13:23 2016
New Revision: 283437

URL: http://llvm.org/viewvc/llvm-project?rev=283437&view=rev
Log:
AMDGPU: Partially fix reported code size for some instructions

These ones need to have the size on the pseudo instruction set for
getInstSizeInBytes to work correctly. These also have a statically
known size.

Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    llvm/trunk/lib/Target/AMDGPU/BUFInstructions.td
    llvm/trunk/lib/Target/AMDGPU/DSInstructions.td
    llvm/trunk/lib/Target/AMDGPU/SOPInstructions.td

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp?rev=283437&r1=283436&r2=283437&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp Thu Oct  6 05:13:23 2016
@@ -346,7 +346,8 @@ void AMDGPUAsmPrinter::getSIProgramInfo(
       if (MI.isDebugValue())
         continue;
 
-      CodeSize += TII->getInstSizeInBytes(MI);
+      if (isVerbose())
+        CodeSize += TII->getInstSizeInBytes(MI);
 
       unsigned numOperands = MI.getNumOperands();
       for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) {

Modified: llvm/trunk/lib/Target/AMDGPU/BUFInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/BUFInstructions.td?rev=283437&r1=283436&r2=283437&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/BUFInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/BUFInstructions.td Thu Oct  6 05:13:23 2016
@@ -66,6 +66,7 @@ class MTBUF_Pseudo <string opName, dag o
 
   let isPseudo = 1;
   let isCodeGenOnly = 1;
+  let Size = 8;
   let UseNamedOperandTable = 1;
 
   string Mnemonic = opName;
@@ -77,7 +78,6 @@ class MTBUF_Pseudo <string opName, dag o
   let Uses = [EXEC];
 
   let hasSideEffects = 0;
-  let UseNamedOperandTable = 1;
   let SchedRW = [WriteVMEM];
 }
 
@@ -159,6 +159,7 @@ class MUBUF_Pseudo <string opName, dag o
 
   let isPseudo = 1;
   let isCodeGenOnly = 1;
+  let Size = 8;
   let UseNamedOperandTable = 1;
 
   string Mnemonic = opName;

Modified: llvm/trunk/lib/Target/AMDGPU/DSInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/DSInstructions.td?rev=283437&r1=283436&r2=283437&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/DSInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/DSInstructions.td Thu Oct  6 05:13:23 2016
@@ -15,6 +15,7 @@ class DS_Pseudo <string opName, dag outs
 
   let LGKM_CNT = 1;
   let DS = 1;
+  let Size = 8;
   let UseNamedOperandTable = 1;
   let Uses = [M0, EXEC];
 

Modified: llvm/trunk/lib/Target/AMDGPU/SOPInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SOPInstructions.td?rev=283437&r1=283436&r2=283437&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SOPInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/SOPInstructions.td Thu Oct  6 05:13:23 2016
@@ -575,8 +575,8 @@ def S_SETREG_B32 : SOPK_Pseudo <
 def S_SETREG_IMM32_B32 : SOPK_Pseudo <
   "s_setreg_imm32_b32",
   (outs), (ins i32imm:$imm, hwreg:$simm16),
-  "$simm16, $imm"
-> {
+  "$simm16, $imm"> {
+  let Size = 8; // Unlike every other SOPK instruction.
   let has_sdst = 0;
 }
 
@@ -688,6 +688,7 @@ class SOPP <bits<7> op, dag ins, string
   let hasSideEffects = 0;
   let SALU = 1;
   let SOPP = 1;
+  let Size = 4;
   let SchedRW = [WriteSALU];
 
   let UseNamedOperandTable = 1;