[llvm] r283323 - [Thumb] Don't try and emit LDRH/LDRB from the constant pool

[James Molloy via llvm-commits]

Hi,

Devious! Thanks, I'll try that tomorrow.

James

> On 5 Oct 2016, at 21:09, Friedman, Eli <efriedma at codeaurora.org> wrote:
>
>> On 10/5/2016 7:52 AM, James Molloy via llvm-commits wrote:
>> Author: jamesm
>> Date: Wed Oct  5 09:52:13 2016
>> New Revision: 283323
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=283323&view=rev
>> Log:
>> [Thumb] Don't try and emit LDRH/LDRB from the constant pool
>>
>> This is not a valid encoding - these instructions cannot do PC-relative addressing.
>>
>> The underlying problem here is of whitelist in ARMISelDAGToDAG that unwraps ARMISD::Wrappers during addressing-mode selection. This didn't realise TargetConstantPool was actually possible, so didn't handle it.
>>
>> Added:
>>     llvm/trunk/test/CodeGen/ARM/constantpool-promote-ldrh.ll
>> Modified:
>>     llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
>>
>> Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=283323&r1=283322&r2=283323&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Wed Oct  5 09:52:13 2016
>> @@ -1188,6 +1188,7 @@ ARMDAGToDAGISel::SelectThumbAddrModeImm5
>>      } else if (N.getOpcode() == ARMISD::Wrapper &&
>>          N.getOperand(0).getOpcode() != ISD::TargetGlobalAddress &&
>>          N.getOperand(0).getOpcode() != ISD::TargetExternalSymbol &&
>> +        N.getOperand(0).getOpcode() != ISD::TargetConstantPool &&
>>          N.getOperand(0).getOpcode() != ISD::TargetGlobalTLSAddress) {
>>        Base = N.getOperand(0);
>>      } else {
>>
>> Added: llvm/trunk/test/CodeGen/ARM/constantpool-promote-ldrh.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/constantpool-promote-ldrh.ll?rev=283323&view=auto
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/ARM/constantpool-promote-ldrh.ll (added)
>> +++ llvm/trunk/test/CodeGen/ARM/constantpool-promote-ldrh.ll Wed Oct  5 09:52:13 2016
>> @@ -0,0 +1,22 @@
>> +; RUN: llc < %s -O0 -fast-isel=false | FileCheck %s
>> +; RUN: llc < %s -O0 -fast-isel=false -filetype=obj
>> +target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
>> +target triple = "thumbv6m-arm-linux-gnueabi"
>> +
>> + at fn1.a = private unnamed_addr constant [4 x i16] [i16 6, i16 0, i16 0, i16 0], align 2
>> +
>> +; We must not try and emit this bad instruction: "ldrh r1, .LCPI0_0"
>> +; CHECK-LABEL: fn1:
>> +; CHECK: adr [[base:r[0-9]+]], .LCPI0_0
>> +; CHECK-NOT: ldrh {{r[0-9]+}}, .LCPI0_0
>> +; FIXME: We want to use [[base]] below instead of "r0", but the preceding square bracket confuses FileCheck.
>> +; CHECK: ldrh r{{[0-9]+}}, [r0]
>
> You can write "ldrh r{{[0-9]+}}, {{\[}}[[base]]]".
>
> -Eli
>
> --
> Employee of Qualcomm Innovation Center, Inc.
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
>
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