[PATCH] D24662: [Sparc][LEON] Hardware erratum fix: Insert NOPs around double precision instructions

[Daniel Cederman via llvm-commits]

dcederman added a subscriber: llvm-commits.
dcederman added inline comments.


> LeonPasses.cpp:281
> +// This erratum fix for some earlier LEON processors fixes a problem where a
> +// double precision load will not yield the correct result if used in FMUL,
> +// FDIV, FADD, FSUB or FSQRT instructions later. If this sequence is detected,

It should be a single precision load according to the errata document.

From http://www.atmel.com/Images/doc4409.pdf : 
"Data dependency is not properly checked between a load singleword floating - point instruction (LDF) involving an odd-numbered  floating-point  register as  a  destination  of  the  load  and  an  immediately  following  double-precision  floating-point instruction".

> LeonPasses.cpp:338-339
> +			  Modified = true;
> +			}
> +		  }
> +		} else if (NextOpcode == SP::FSQRTD) {

The indentation looks wrong here. You can use clang format to automatically indent and format your patch.

Repository:
  rL LLVM

https://reviews.llvm.org/D24662