[PATCH] D24681: Optimize patterns of vectorized interleaved memory accesses for X86.

[Simon Pilgrim via llvm-commits]

RKSimon added a comment.

What's the reasoning behind adding X86InterleavedAccess.cpp instead of including inside X86ISelLowering.cpp?



> X86InterleavedAccess.cpp:150
> +
> +  if (Shuffles.size() != UniqueIndices.size())
> +    return false;

Move both the tests to the top and test (Shuffles.size() != Indices.size()) directly?

> X86InterleavedAccess.cpp:155
> +    return false;
> +  }
> +

Remove braces (style).

> x86-interleaved-access.ll:1
> +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
> +; RUN: llc -mtriple=x86_64-pc-linux  -mattr=+avx < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX1

Is this actually true? The checks below don't look like what the script would generate.

https://reviews.llvm.org/D24681