[PATCH] D24681: Optimize patterns of vectorized interleaved memory accesses for X86.

[Farhana Aleen via llvm-commits]

Farhana added a comment.

Hi Zvi,

Thanks for your comments, I incorporated them.

Farhana


================
Comment at: lib/Target/X86/X86InterleavedAccess.cpp:34
@@ +33,3 @@
+  if (!SubTarget.hasAVX() ||
+      ShuffleVecSize != 256 ||
+      DL.getTypeSizeInBits(ShuffleEltTy) != 64 ||
----------------
Yes, we need to check whether factor ==4. So, the check Shuffles.size() != UniqueIndices.size() at line 150would cover that and it would also make sure that we don't have duplicate shuffles.

I don't think we to check the load size, all we care about the shuffles. And if the loadsize is not correct then the assertion in line 78 will hit since at that point the load is expected to load only the elements in the shuffles.  


https://reviews.llvm.org/D24681