[PATCH] D24924: [PPC] Better codegen for AND, ANY_EXT, SRL sequence

Ehsan Amiri via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 26 10:46:28 PDT 2016


amehsan added inline comments.

================
Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:2647
@@ +2646,3 @@
+
+        Val = SDValue(CurDAG->getMachineNode(PPC::INSERT_SUBREG, dl, ResultType,
+                      IDVal, Op0.getOperand(0), getI32Imm(1, dl)), 0);
----------------
hfinkel wrote:
> We shouldn't speculatively create new nodes if we can avoid it.
Sorry, I am not sure I understand this comment. What is speculative here? I have a i32 and want to convert it to i64.  I tried a couple of different options and this sequence was the only one that worked. This appeared in a small kernel that I wrote and included a similar conversion.




https://reviews.llvm.org/D24924





More information about the llvm-commits mailing list