[PATCH] D23172: IfConversion: Add implicit uses for live subregisters

Quentin Colombet via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 22 12:42:57 PDT 2016


qcolombet added a comment.

> If I understand correctly---the reg unit approach will still add the implicit operands, it will just use reg units to track liveness?


You shouldn't need the implicit operands anymore, because the double register would make the two reg unit of the simple register live and the uses would be from those reg unit.
In other words,
live in: D0 (sets reg unit A and B)
use S0 (uses reg unit A)
use S1 (uses reg unit B)
Would be valid without anything else. (Modulo updating the MachineVerifier to check at the RegUnit level).
But again, the problem with the RegUnit approach is that updating the live-ins may be expensive.

I admit I did not spend a lot of time thinking about it.

Cheers,
Q.


Repository:
  rL LLVM

https://reviews.llvm.org/D23172





More information about the llvm-commits mailing list