[PATCH] D24672: AMDGPU/SI: Eliminate more instructions that truncate inputs to 24-bit ops

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 16 08:57:54 PDT 2016


arsenm added inline comments.

================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2441-2449
@@ -2440,1 +2440,11 @@
 
+static SDValue reduce24BitOperand(SDValue Op, SelectionDAG &DAG) {
+
+  if (Op.getOpcode() == ISD::AND &&
+      dyn_cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()
+      .countLeadingZeros() == 8)
+    return Op.getOperand(0);
+
+  return Op;
+}
+
----------------
arsenm wrote:
> This looks like an overly specific version of computeKnownBits. I was trying to figure out how to factor SimplifyDemandedBits to allow checking multiple uses but never got around to trying it
For and this could also be >= 8


https://reviews.llvm.org/D24672





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