[llvm] r281531 - [x86] regenerate checks

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Wed Sep 14 15:21:28 2016
New Revision: 281531

URL: http://llvm.org/viewvc/llvm-project?rev=281531&view=rev
Log:
[x86] regenerate checks

Modified:
    llvm/trunk/test/CodeGen/X86/setcc.ll

Modified: llvm/trunk/test/CodeGen/X86/setcc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/setcc.ll?rev=281531&r1=281530&r2=281531&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/setcc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/setcc.ll Wed Sep 14 15:21:28 2016
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
 ; rdar://7329206
 
@@ -5,48 +6,59 @@
 ; all 1's or all 0's.
 
 define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
-entry:
 ; CHECK-LABEL: t1:
-; CHECK: xorl %eax, %eax
-; CHECK: seta %al
-; CHECK: shll $5, %eax
-  %0 = icmp ugt i16 %x, 26                        ; <i1> [#uses=1]
-  %iftmp.1.0 = select i1 %0, i16 32, i16 0        ; <i16> [#uses=1]
-  ret i16 %iftmp.1.0
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $26, %edi
+; CHECK-NEXT:    seta %al
+; CHECK-NEXT:    shll $5, %eax
+; CHECK-NEXT:    retq
+;
+  %t0 = icmp ugt i16 %x, 26
+  %if = select i1 %t0, i16 32, i16 0
+  ret i16 %if
 }
 
 define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp {
-entry:
 ; CHECK-LABEL: t2:
-; CHECK: sbbl %eax, %eax
-; CHECK: andl $32, %eax
-  %0 = icmp ult i16 %x, 26                        ; <i1> [#uses=1]
-  %iftmp.0.0 = select i1 %0, i16 32, i16 0        ; <i16> [#uses=1]
-  ret i16 %iftmp.0.0
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    cmpl $26, %edi
+; CHECK-NEXT:    sbbl %eax, %eax
+; CHECK-NEXT:    andl $32, %eax
+; CHECK-NEXT:    retq
+;
+  %t0 = icmp ult i16 %x, 26
+  %if = select i1 %t0, i16 32, i16 0
+  ret i16 %if
 }
 
 define i64 @t3(i64 %x) nounwind readnone ssp {
-entry:
 ; CHECK-LABEL: t3:
-; CHECK: sbbq %rax, %rax
-; CHECK: andl $64, %eax
-  %0 = icmp ult i64 %x, 18                        ; <i1> [#uses=1]
-  %iftmp.2.0 = select i1 %0, i64 64, i64 0        ; <i64> [#uses=1]
-  ret i64 %iftmp.2.0
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    cmpq $18, %rdi
+; CHECK-NEXT:    sbbq %rax, %rax
+; CHECK-NEXT:    andl $64, %eax
+; CHECK-NEXT:    retq
+;
+  %t0 = icmp ult i64 %x, 18
+  %if = select i1 %t0, i64 64, i64 0
+  ret i64 %if
 }
 
 @v4 = common global i32 0, align 4
 
 define i32 @t4(i32 %a) {
-entry:
 ; CHECK-LABEL: t4:
-; CHECK:  movq    _v4 at GOTPCREL(%rip), %rax
-; CHECK:  cmpl    $1, (%rax)
-; CHECK:  sbbl    %eax, %eax
-; CHECK:  andl    $32768, %eax
-; CHECK:  leal    65536(%rax,%rax), %eax
-  %0 = load i32, i32* @v4, align 4
-  %not.tobool = icmp eq i32 %0, 0
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movq _v4@{{.*}}(%rip), %rax
+; CHECK-NEXT:    cmpl $1, (%rax)
+; CHECK-NEXT:    sbbl %eax, %eax
+; CHECK-NEXT:    andl $32768, %eax ## imm = 0x8000
+; CHECK-NEXT:    leal 65536(%rax,%rax), %eax
+; CHECK-NEXT:    retq
+;
+  %t0 = load i32, i32* @v4, align 4
+  %not.tobool = icmp eq i32 %t0, 0
   %conv.i = sext i1 %not.tobool to i16
   %call.lobit = lshr i16 %conv.i, 15
   %add.i.1 = add nuw nsw i16 %call.lobit, 1
@@ -56,10 +68,12 @@ entry:
 }
 
 define i8 @t5(i32 %a) #0 {
-entry:
 ; CHECK-LABEL: t5:
-; CHECK:  testl   %edi, %edi
-; CHECK:  setns   %al
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    testl %edi, %edi
+; CHECK-NEXT:    setns %al
+; CHECK-NEXT:    retq
+;
   %.lobit = lshr i32 %a, 31
   %trunc = trunc i32 %.lobit to i8
   %.not = xor i8 %trunc, 1
@@ -67,10 +81,12 @@ entry:
 }
 
 define zeroext i1 @t6(i32 %a) #0 {
-entry:
 ; CHECK-LABEL: t6:
-; CHECK:  testl   %edi, %edi
-; CHECK:  setns   %al
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    testl %edi, %edi
+; CHECK-NEXT:    setns %al
+; CHECK-NEXT:    retq
+;
   %.lobit = lshr i32 %a, 31
   %trunc = trunc i32 %.lobit to i1
   %.not = xor i1 %trunc, 1