[PATCH] D23446: [X86] Enable setcc to srl(ctlz) transformation on btver2 architectures.

[Simon Pilgrim via llvm-commits]

RKSimon added a comment.

Any update on the performance investigations?


================
Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:3588
@@ -3586,1 +3587,3 @@
+      else
+        return DAG.getNode(ISD::ZERO_EXTEND, dl, ExtTy, Scc);
     }
----------------
These can be replaced with DAG.getZExtOrTrunc(Scc, dl, ExtTy);


https://reviews.llvm.org/D23446