[llvm] r281231 - [InstCombine] use m_APInt to allow icmp X, C folds for splat constant vectors

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Mon Sep 12 11:25:41 2016
New Revision: 281231

URL: http://llvm.org/viewvc/llvm-project?rev=281231&view=rev
Log:
[InstCombine] use m_APInt to allow icmp X, C folds for splat constant vectors

isSignBitCheck could be changed to take a pointer param to avoid the 'UnusedBit' ugliness.

Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
    llvm/trunk/test/Transforms/InstCombine/shift.ll
    llvm/trunk/test/Transforms/InstCombine/vec_sext.ll

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=281231&r1=281230&r2=281231&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Mon Sep 12 11:25:41 2016
@@ -3153,9 +3153,10 @@ Instruction *InstCombiner::foldICmpUsing
   // If this is a normal comparison, it demands all bits. If it is a sign bit
   // comparison, it only demands the sign bit.
   bool IsSignBit = false;
-  if (ConstantInt *CI = dyn_cast<ConstantInt>(Op1)) {
+  const APInt *CmpC;
+  if (match(Op1, m_APInt(CmpC))) {
     bool UnusedBit;
-    IsSignBit = isSignBitCheck(Pred, CI->getValue(), UnusedBit);
+    IsSignBit = isSignBitCheck(Pred, *CmpC, UnusedBit);
   }
 
   APInt Op0KnownZero(BitWidth, 0), Op0KnownOne(BitWidth, 0);

Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=281231&r1=281230&r2=281231&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/shift.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/shift.ll Mon Sep 12 11:25:41 2016
@@ -628,11 +628,9 @@ define i1 @test35(i32 %X) {
   ret i1 %tmp2
 }
 
-; FIXME: Vectors should fold the same way.
 define <2 x i1> @test35vec(<2 x i32> %X) {
 ; CHECK-LABEL: @test35vec(
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr <2 x i32> %X, <i32 7, i32 7>
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp slt <2 x i32> [[TMP1]], zeroinitializer
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp slt <2 x i32> %X, zeroinitializer
 ; CHECK-NEXT:    ret <2 x i1> [[TMP2]]
 ;
   %tmp1 = ashr <2 x i32> %X, <i32 7, i32 7>

Modified: llvm/trunk/test/Transforms/InstCombine/vec_sext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/vec_sext.ll?rev=281231&r1=281230&r2=281231&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/vec_sext.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/vec_sext.ll Mon Sep 12 11:25:41 2016
@@ -3,8 +3,8 @@
 
 define <4 x i32> @psignd_3(<4 x i32> %a, <4 x i32> %b) {
 ; CHECK-LABEL: @psignd_3(
-; CHECK-NEXT:    [[B_LOBIT:%.*]] = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <4 x i32> zeroinitializer, %a
+; CHECK-NEXT:    [[B_LOBIT:%.*]] = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
 ; CHECK-NEXT:    [[T1:%.*]] = xor <4 x i32> [[B_LOBIT]], <i32 -1, i32 -1, i32 -1, i32 -1>
 ; CHECK-NEXT:    [[T2:%.*]] = and <4 x i32> %a, [[T1]]
 ; CHECK-NEXT:    [[T3:%.*]] = and <4 x i32> [[B_LOBIT]], [[SUB]]
@@ -25,8 +25,8 @@ define <4 x i32> @psignd_3(<4 x i32> %a,
 
 define <4 x i32> @test1(<4 x i32> %a, <4 x i32> %b) {
 ; CHECK-LABEL: @test1(
-; CHECK-NEXT:    [[B_LOBIT:%.*]] = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <4 x i32> zeroinitializer, %a
+; CHECK-NEXT:    [[B_LOBIT:%.*]] = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
 ; CHECK-NEXT:    [[B_LOBIT_NOT:%.*]] = xor <4 x i32> [[B_LOBIT]], <i32 -1, i32 -1, i32 -1, i32 -1>
 ; CHECK-NEXT:    [[T2:%.*]] = and <4 x i32> [[B_LOBIT]], %a
 ; CHECK-NEXT:    [[T3:%.*]] = and <4 x i32> [[B_LOBIT_NOT]], [[SUB]]