[llvm] r281224 - [BranchFolding] Unique added live-ins after hoisting code.

[Ahmed Bougacha via llvm-commits]

Author: ab
Date: Mon Sep 12 11:05:31 2016
New Revision: 281224

URL: http://llvm.org/viewvc/llvm-project?rev=281224&view=rev
Log:
[BranchFolding] Unique added live-ins after hoisting code.

We're not supposed to have duplicate live-ins.

Modified:
    llvm/trunk/lib/CodeGen/BranchFolding.cpp
    llvm/trunk/test/CodeGen/X86/tail-call-conditional.mir

Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=281224&r1=281223&r2=281224&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Mon Sep 12 11:05:31 2016
@@ -1972,14 +1972,21 @@ bool BranchFolder::HoistCommonCodeInSucc
   FBB->erase(FBB->begin(), FIB);
 
   // Update livein's.
+  bool AddedLiveIns = false;
   for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) {
     unsigned Def = LocalDefs[i];
     if (LocalDefsSet.count(Def)) {
       TBB->addLiveIn(Def);
       FBB->addLiveIn(Def);
+      AddedLiveIns = true;
     }
   }
 
+  if (AddedLiveIns) {
+    TBB->sortUniqueLiveIns();
+    FBB->sortUniqueLiveIns();
+  }
+
   ++NumHoist;
   return true;
 }

Modified: llvm/trunk/test/CodeGen/X86/tail-call-conditional.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tail-call-conditional.mir?rev=281224&r1=281223&r2=281224&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tail-call-conditional.mir (original)
+++ llvm/trunk/test/CodeGen/X86/tail-call-conditional.mir Mon Sep 12 11:05:31 2016
@@ -66,7 +66,7 @@ body:             |
     TCRETURNdi64 @f1, 0, csr_64, implicit %rsp, implicit %rdi, implicit %rsi
 
   ; CHECK: bb.2:
-  ; CHECK-NEXT: liveins: %rax, %rsi, %rdi, %rsi
+  ; CHECK-NEXT: liveins: %rax, %rdi, %rsi
   ; CHECK-NEXT: {{^  $}}
   ; CHECK-NEXT: TCRETURNdi64 @f2, 0, csr_64, implicit %rsp, implicit %rdi, implicit %rsi