[llvm] r281104 - [Hexagon] Fix disassembler crash after r279255

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Fri Sep  9 16:45:00 2016
New Revision: 281104

URL: http://llvm.org/viewvc/llvm-project?rev=281104&view=rev
Log:
[Hexagon] Fix disassembler crash after r279255

When p0 was added as an explicit operand to the duplex subinstructions,
the disassembler was not updated to reflect this.

Added:
    llvm/trunk/test/MC/Hexagon/dis-duplex-p0.s
Modified:
    llvm/trunk/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp

Modified: llvm/trunk/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp?rev=281104&r1=281103&r2=281104&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp Fri Sep  9 16:45:00 2016
@@ -1501,6 +1501,9 @@ void HexagonDisassembler::addSubinstOper
     operand = getRegFromSubinstEncoding(inst & 0xf);
     Op = MCOperand::createReg(operand);
     MI->addOperand(Op);
+    if (opcode == Hexagon::V4_SA1_setin1)
+      break;
+    MI->addOperand(MCOperand::createReg(Hexagon::P0));
     break;
   case Hexagon::V4_SA1_cmpeqi:
     // Rs 7-4, u 1-0

Added: llvm/trunk/test/MC/Hexagon/dis-duplex-p0.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/dis-duplex-p0.s?rev=281104&view=auto
==============================================================================
--- llvm/trunk/test/MC/Hexagon/dis-duplex-p0.s (added)
+++ llvm/trunk/test/MC/Hexagon/dis-duplex-p0.s Fri Sep  9 16:45:00 2016
@@ -0,0 +1,7 @@
+// RUN: llvm-mc -arch=hexagon -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
+// REQUIRES: asserts
+  .text
+// CHECK: { r7 = #-1; r7 = #-1 }
+  .long 0x3a373a27
+// CHECK: { if (!p0.new) r7 = #0; if (p0.new) r7 = #0 }
+  .long 0x3a573a47