[PATCH] D24130: [RegisterScavenger] Remove aliasing registers of operands from the candidate set

[silviu.baranga@arm.com via llvm-commits]

sbaranga added a comment.

I've investigated using MIR for getting a test case. The problem that I currently have with this is that I'm unable to run the PEI pass (where the problem is happening). If I try to do this I get a segfault in the stack protector pass. The problem seems to be that the TargetMachine is null. I'm not sure if this is something specific to PEI - but there doesn't seem to be any other regression tests that tries to run just this pass.

Here are the conditions that would trigger this bug:
We need to have a huge stack frame and a load or store to a stack location such that the location is far enough from the stack pointer and we need to scavenge a register to form the address. In order to avoid the heuristics from the register scavenger, all other registers except the one we want should be live. Our instruction should load or store a sub-register of the address register (for example str w0, [x0]).


https://reviews.llvm.org/D24130