[PATCH] D24274: AMDGPU: Improve splitting 64-bit bit ops by constants

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 6 16:14:50 PDT 2016


arsenm updated this revision to Diff 70486.
arsenm added a comment.

Use register class to decide mov instruction for complete fold case


https://reviews.llvm.org/D24274

Files:
  lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  lib/Target/AMDGPU/AMDGPUISelLowering.h
  lib/Target/AMDGPU/SIFoldOperands.cpp
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIISelLowering.h
  lib/Target/AMDGPU/SIInstructions.td
  test/CodeGen/AMDGPU/and.ll
  test/CodeGen/AMDGPU/bitreverse.ll
  test/CodeGen/AMDGPU/bswap.ll
  test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
  test/CodeGen/AMDGPU/ctpop64.ll
  test/CodeGen/AMDGPU/or.ll
  test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
  test/CodeGen/AMDGPU/sint_to_fp.i64.ll
  test/CodeGen/AMDGPU/xor.ll

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