[llvm] r280559 - [PowerPC] Add support for the extended dcbf form and mnemonics
Hal Finkel via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 2 16:41:55 PDT 2016
Author: hfinkel
Date: Fri Sep 2 18:41:54 2016
New Revision: 280559
URL: http://llvm.org/viewvc/llvm-project?rev=280559&view=rev
Log:
[PowerPC] Add support for the extended dcbf form and mnemonics
dcbf has an optional hint-like field, add support for the extended form and the
associated mnemonics (dcbfl and dcbflp).
Partially fixes PR24796.
Modified:
llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s
Modified: llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp?rev=280559&r1=280558&r2=280559&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp Fri Sep 2 18:41:54 2016
@@ -874,6 +874,23 @@ void PPCAsmParser::ProcessInstruction(MC
Inst = TmpInst;
break;
}
+ case PPC::DCBFx:
+ case PPC::DCBFL:
+ case PPC::DCBFLP: {
+ int L = 0;
+ if (Opcode == PPC::DCBFL)
+ L = 1;
+ else if (Opcode == PPC::DCBFLP)
+ L = 3;
+
+ MCInst TmpInst;
+ TmpInst.setOpcode(PPC::DCBF);
+ TmpInst.addOperand(MCOperand::createImm(L));
+ TmpInst.addOperand(Inst.getOperand(0));
+ TmpInst.addOperand(Inst.getOperand(1));
+ Inst = TmpInst;
+ break;
+ }
case PPC::LAx: {
MCInst TmpInst;
TmpInst.setOpcode(PPC::LA);
Modified: llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp?rev=280559&r1=280558&r2=280559&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp Fri Sep 2 18:41:54 2016
@@ -135,6 +135,25 @@ void PPCInstPrinter::printInst(const MCI
printAnnotation(O, Annot);
return;
}
+
+ if (MI->getOpcode() == PPC::DCBF) {
+ unsigned char L = MI->getOperand(0).getImm();
+ if (!L || L == 1 || L == 3) {
+ O << "\tdcbf";
+ if (L == 1 || L == 3)
+ O << "l";
+ if (L == 3)
+ O << "p";
+ O << " ";
+
+ printOperand(MI, 1, O);
+ O << ", ";
+ printOperand(MI, 2, O);
+
+ printAnnotation(O, Annot);
+ return;
+ }
+ }
if (!printAliasInstr(MI, O))
printInstruction(MI, O);
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=280559&r1=280558&r2=280559&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Fri Sep 2 18:41:54 2016
@@ -1448,9 +1448,6 @@ def RFEBB : XLForm_S<19, 146, (outs), (i
def DCBA : DCB_Form<758, 0, (outs), (ins memrr:$dst), "dcba $dst",
IIC_LdStDCBF, [(int_ppc_dcba xoaddr:$dst)]>,
PPC970_DGroup_Single;
-def DCBF : DCB_Form<86, 0, (outs), (ins memrr:$dst), "dcbf $dst",
- IIC_LdStDCBF, [(int_ppc_dcbf xoaddr:$dst)]>,
- PPC970_DGroup_Single;
def DCBI : DCB_Form<470, 0, (outs), (ins memrr:$dst), "dcbi $dst",
IIC_LdStDCBF, [(int_ppc_dcbi xoaddr:$dst)]>,
PPC970_DGroup_Single;
@@ -1464,6 +1461,10 @@ def DCBZL : DCB_Form<1014, 1, (outs), (
IIC_LdStDCBF, [(int_ppc_dcbzl xoaddr:$dst)]>,
PPC970_DGroup_Single;
+def DCBF : DCB_Form_hint<86, (outs), (ins u5imm:$TH, memrr:$dst),
+ "dcbf $dst, $TH", IIC_LdStDCBF, []>,
+ PPC970_DGroup_Single;
+
let hasSideEffects = 0, mayLoad = 1, mayStore = 1 in {
def DCBT : DCB_Form_hint<278, (outs), (ins u5imm:$TH, memrr:$dst),
"dcbt $dst, $TH", IIC_LdStDCBF, []>,
@@ -1480,6 +1481,8 @@ def : Pat<(int_ppc_dcbt xoaddr:$dst),
(DCBT 0, xoaddr:$dst)>;
def : Pat<(int_ppc_dcbtst xoaddr:$dst),
(DCBTST 0, xoaddr:$dst)>;
+def : Pat<(int_ppc_dcbf xoaddr:$dst),
+ (DCBF 0, xoaddr:$dst)>;
def : Pat<(prefetch xoaddr:$dst, (i32 0), imm, (i32 1)),
(DCBT 0, xoaddr:$dst)>; // data prefetch for loads
@@ -3820,6 +3823,10 @@ def DCBTSTCT : PPCAsmPseudo<"dcbtstct $d
def DCBTSTDS : PPCAsmPseudo<"dcbtstds $dst, $TH", (ins memrr:$dst, u5imm:$TH)>;
def DCBTSTT : PPCAsmPseudo<"dcbtstt $dst", (ins memrr:$dst)>;
+def DCBFx : PPCAsmPseudo<"dcbf $dst", (ins memrr:$dst)>;
+def DCBFL : PPCAsmPseudo<"dcbfl $dst", (ins memrr:$dst)>;
+def DCBFLP : PPCAsmPseudo<"dcbflp $dst", (ins memrr:$dst)>;
+
def : InstAlias<"crset $bx", (CREQV crbitrc:$bx, crbitrc:$bx, crbitrc:$bx)>;
def : InstAlias<"crclr $bx", (CRXOR crbitrc:$bx, crbitrc:$bx, crbitrc:$bx)>;
def : InstAlias<"crmove $bx, $by", (CROR crbitrc:$bx, crbitrc:$by, crbitrc:$by)>;
Modified: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt?rev=280559&r1=280558&r2=280559&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt Fri Sep 2 18:41:54 2016
@@ -54,6 +54,12 @@
# CHECK: dcbf 2, 3
0x7c 0x02 0x18 0xac
+# CHECK: dcbfl 2, 3
+0x7c 0x22 0x18 0xac
+
+# CHECK: dcbflp 2, 3
+0x7c 0x62 0x18 0xac
+
# CHECK: lbarx 2, 3, 4
0x7c 0x43 0x20 0x68
Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s?rev=280559&r1=280558&r2=280559&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s Fri Sep 2 18:41:54 2016
@@ -60,7 +60,12 @@
# CHECK-BE: dcbst 2, 3 # encoding: [0x7c,0x02,0x18,0x6c]
# CHECK-LE: dcbst 2, 3 # encoding: [0x6c,0x18,0x02,0x7c]
dcbst 2, 3
-# FIXME: dcbf 2, 3, 1
+# CHECK-BE: dcbfl 2, 3 # encoding: [0x7c,0x22,0x18,0xac]
+# CHECK-LE: dcbfl 2, 3 # encoding: [0xac,0x18,0x22,0x7c]
+ dcbf 2, 3, 1
+# CHECK-BE: dcbflp 2, 3 # encoding: [0x7c,0x62,0x18,0xac]
+# CHECK-LE: dcbflp 2, 3 # encoding: [0xac,0x18,0x62,0x7c]
+ dcbf 2, 3, 3
# Synchronization instructions
@@ -106,7 +111,12 @@
# CHECK-BE: dcbf 2, 3 # encoding: [0x7c,0x02,0x18,0xac]
# CHECK-LE: dcbf 2, 3 # encoding: [0xac,0x18,0x02,0x7c]
dcbf 2, 3
-# FIXME: dcbfl 2, 3
+# CHECK-BE: dcbfl 2, 3 # encoding: [0x7c,0x22,0x18,0xac]
+# CHECK-LE: dcbfl 2, 3 # encoding: [0xac,0x18,0x22,0x7c]
+ dcbfl 2, 3
+# CHECK-BE: dcbflp 2, 3 # encoding: [0x7c,0x62,0x18,0xac]
+# CHECK-LE: dcbflp 2, 3 # encoding: [0xac,0x18,0x62,0x7c]
+ dcbflp 2, 3
# CHECK-BE: lbarx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x68]
# CHECK-LE: lbarx 2, 3, 4 # encoding: [0x68,0x20,0x43,0x7c]
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