[llvm] r280188 - [PowerPC] Don't spill the frame pointer twice

[Hal Finkel via llvm-commits]

Author: hfinkel
Date: Tue Aug 30 19:52:03 2016
New Revision: 280188

URL: http://llvm.org/viewvc/llvm-project?rev=280188&view=rev
Log:
[PowerPC] Don't spill the frame pointer twice

When a function contains something, such as inline asm, which explicitly
clobbers the register used as the frame pointer, don't spill it twice. If we
need a frame pointer, it will be saved/restored in the prologue/epilogue code.
Explicitly spilling it again will reuse the same spill slot used by the
prologue/epilogue code, thus clobbering the saved value. The same applies
to the base-pointer or PIC-base register.

Partially fixes PR26856. Thanks to Ulrich for his analysis and the small
inline-asm reproducer.

Added:
    llvm/trunk/test/CodeGen/PowerPC/no-dup-spill-fp.ll
Modified:
    llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp?rev=280188&r1=280187&r2=280188&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp Tue Aug 30 19:52:03 2016
@@ -1419,6 +1419,17 @@ void PPCFrameLowering::determineCalleeSa
     FI->setPICBasePointerSaveIndex(PBPSI);
   }
 
+  // Make sure we don't explicitly spill r31, because, for example, we have
+  // some inline asm which explicity clobbers it, when we otherwise have a
+  // frame pointer and are using r31's spill slot for the prologue/epilogue
+  // code. Same goes for the base pointer and the PIC base register.
+  if (needsFP(MF))
+    SavedRegs.reset(isPPC64 ? PPC::X31 : PPC::R31);
+  if (RegInfo->hasBasePointer(MF))
+    SavedRegs.reset(RegInfo->getBaseRegister(MF));
+  if (FI->usesPICBase())
+    SavedRegs.reset(PPC::R30);
+
   // Reserve stack space to move the linkage area to in case of a tail call.
   int TCSPDelta = 0;
   if (MF.getTarget().Options.GuaranteedTailCallOpt &&

Added: llvm/trunk/test/CodeGen/PowerPC/no-dup-spill-fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/no-dup-spill-fp.ll?rev=280188&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/no-dup-spill-fp.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/no-dup-spill-fp.ll Tue Aug 30 19:52:03 2016
@@ -0,0 +1,26 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "E-m:e-i64:64-n32:64"
+target triple = "powerpc64"
+
+; Function Attrs: nounwind
+define void @test() #0 {
+entry:
+  call void @func()
+  call void asm sideeffect "nop", "~{r31}"() #1, !srcloc !0
+  ret void
+
+; CHECK-LABEL: @test
+; CHECK: std 31, -8(1)
+; CHECK: stdu 1, -{{[0-9]+}}(1)
+; CHECK-NOT: std 31,
+; CHECK: bl func
+; CHECK: ld 31, -8(1)
+; CHECK: blr
+}
+
+declare void @func()
+
+attributes #0 = { nounwind "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "target-cpu"="ppc64" }
+attributes #1 = { nounwind }
+
+!0 = !{i32 57}