[llvm] r279979 - Make vec_fabs.ll pass with MSVC 2013

[Reid Kleckner via llvm-commits]

Author: rnk
Date: Mon Aug 29 11:35:43 2016
New Revision: 279979

URL: http://llvm.org/viewvc/llvm-project?rev=279979&view=rev
Log:
Make vec_fabs.ll pass with MSVC 2013

We should revert this change once we drop support for MSVC 2013.

Modified:
    llvm/trunk/test/CodeGen/X86/vec_fabs.ll

Modified: llvm/trunk/test/CodeGen/X86/vec_fabs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_fabs.ll?rev=279979&r1=279978&r2=279979&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_fabs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_fabs.ll Mon Aug 29 11:35:43 2016
@@ -6,6 +6,9 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64_AVX512VL
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64_AVX512VLDQ
 
+; FIXME: Drop the regex pattern matching of 'nan' once we drop support for MSVC
+; 2013.
+
 define <2 x double> @fabs_v2f64(<2 x double> %p) {
 ; X32-LABEL: fabs_v2f64:
 ; X32:       # BB#0:
@@ -135,7 +138,7 @@ declare <8 x float> @llvm.fabs.v8f32(<8
 define <8 x double> @fabs_v8f64(<8 x double> %p) {
 ; X32_AVX-LABEL: fabs_v8f64:
 ; X32_AVX:       # BB#0:
-; X32_AVX-NEXT:    vmovaps {{.*#+}} ymm2 = [nan,nan,nan,nan]
+; X32_AVX-NEXT:    vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}]
 ; X32_AVX-NEXT:    vandps %ymm2, %ymm0, %ymm0
 ; X32_AVX-NEXT:    vandps %ymm2, %ymm1, %ymm1
 ; X32_AVX-NEXT:    retl
@@ -153,7 +156,7 @@ define <8 x double> @fabs_v8f64(<8 x dou
 ;
 ; X64_AVX-LABEL: fabs_v8f64:
 ; X64_AVX:       # BB#0:
-; X64_AVX-NEXT:    vmovaps {{.*#+}} ymm2 = [nan,nan,nan,nan]
+; X64_AVX-NEXT:    vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}]
 ; X64_AVX-NEXT:    vandps %ymm2, %ymm0, %ymm0
 ; X64_AVX-NEXT:    vandps %ymm2, %ymm1, %ymm1
 ; X64_AVX-NEXT:    retq
@@ -176,7 +179,7 @@ declare <8 x double> @llvm.fabs.v8f64(<8
 define <16 x float> @fabs_v16f32(<16 x float> %p) {
 ; X32_AVX-LABEL: fabs_v16f32:
 ; X32_AVX:       # BB#0:
-; X32_AVX-NEXT:    vmovaps {{.*#+}} ymm2 = [nan,nan,nan,nan,nan,nan,nan,nan]
+; X32_AVX-NEXT:    vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}]
 ; X32_AVX-NEXT:    vandps %ymm2, %ymm0, %ymm0
 ; X32_AVX-NEXT:    vandps %ymm2, %ymm1, %ymm1
 ; X32_AVX-NEXT:    retl
@@ -194,7 +197,7 @@ define <16 x float> @fabs_v16f32(<16 x f
 ;
 ; X64_AVX-LABEL: fabs_v16f32:
 ; X64_AVX:       # BB#0:
-; X64_AVX-NEXT:    vmovaps {{.*#+}} ymm2 = [nan,nan,nan,nan,nan,nan,nan,nan]
+; X64_AVX-NEXT:    vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}]
 ; X64_AVX-NEXT:    vandps %ymm2, %ymm0, %ymm0
 ; X64_AVX-NEXT:    vandps %ymm2, %ymm1, %ymm1
 ; X64_AVX-NEXT:    retq