[llvm] r279633 - GlobalISel: fix cmp test to be in SSA form

[Tim Northover via llvm-commits]

Author: tnorthover
Date: Wed Aug 24 10:37:51 2016
New Revision: 279633

URL: http://llvm.org/viewvc/llvm-project?rev=279633&view=rev
Log:
GlobalISel: fix cmp test to be in SSA form

Modified:
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir?rev=279633&r1=279632&r2=279633&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir Wed Aug 24 10:37:51 2016
@@ -19,32 +19,33 @@ registers:
   - { id: 4, class: _ }
   - { id: 5, class: _ }
   - { id: 6, class: _ }
+  - { id: 7, class: _ }
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
     %0(64) = COPY %x0
     %1(64) = COPY %x0
 
-    %4(8) = G_TRUNC { s8, s64 } %0
-    %5(8) = G_TRUNC { s8, s64 } %1
+    %2(8) = G_TRUNC { s8, s64 } %0
+    %3(8) = G_TRUNC { s8, s64 } %1
 
     ; CHECK: [[TST32:%[0-9]+]](32) = G_ICMP { s32, s64 } intpred(sge), %0, %1
-    ; CHECK: %2(1) = G_TRUNC { s1, s32 } [[TST32]]
-    %2(1) = G_ICMP { s1, s64 } intpred(sge), %0, %1
+    ; CHECK: %4(1) = G_TRUNC { s1, s32 } [[TST32]]
+    %4(1) = G_ICMP { s1, s64 } intpred(sge), %0, %1
 
-    ; CHECK: [[LHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %4
-    ; CHECK: [[RHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %5
-    ; CHECK: %3(32) = G_ICMP { s32, s32 } intpred(ne), [[LHS32]], [[RHS32]]
-    %3(32) = G_ICMP { s32, s8 } intpred(ne), %4, %5
-
-    ; CHECK: [[LHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %4
-    ; CHECK: [[RHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %5
-    ; CHECK: %3(32) = G_ICMP { s32, s32 } intpred(ugt), [[LHS32]], [[RHS32]]
-    %3(32) = G_ICMP { s32, s8 } intpred(ugt), %4, %5
-
-    ; CHECK: [[LHS32:%[0-9]+]](32) = G_SEXT { s32, s8 } %4
-    ; CHECK: [[RHS32:%[0-9]+]](32) = G_SEXT { s32, s8 } %5
-    ; CHECK: %6(32) = G_ICMP { s32, s32 } intpred(sle), [[LHS32]], [[RHS32]]
-    %6(32) = G_ICMP { s32, s8 } intpred(sle), %4, %5
+    ; CHECK: [[LHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %2
+    ; CHECK: [[RHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %3
+    ; CHECK: %5(32) = G_ICMP { s32, s32 } intpred(ne), [[LHS32]], [[RHS32]]
+    %5(32) = G_ICMP { s32, s8 } intpred(ne), %2, %3
+
+    ; CHECK: [[LHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %2
+    ; CHECK: [[RHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %3
+    ; CHECK: %6(32) = G_ICMP { s32, s32 } intpred(ugt), [[LHS32]], [[RHS32]]
+    %6(32) = G_ICMP { s32, s8 } intpred(ugt), %2, %3
+
+    ; CHECK: [[LHS32:%[0-9]+]](32) = G_SEXT { s32, s8 } %2
+    ; CHECK: [[RHS32:%[0-9]+]](32) = G_SEXT { s32, s8 } %3
+    ; CHECK: %7(32) = G_ICMP { s32, s32 } intpred(sle), [[LHS32]], [[RHS32]]
+    %7(32) = G_ICMP { s32, s8 } intpred(sle), %2, %3
 
 ...