[llvm] r278278 - AMDGPU: s_setpc_b64 should be an indirect branch

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Wed Aug 10 14:20:02 2016
New Revision: 278278

URL: http://llvm.org/viewvc/llvm-project?rev=278278&view=rev
Log:
AMDGPU: s_setpc_b64 should be an indirect branch

Modified:
    llvm/trunk/lib/Target/AMDGPU/SIInstructions.td

Modified: llvm/trunk/lib/Target/AMDGPU/SIInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstructions.td?rev=278278&r1=278277&r2=278278&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstructions.td Wed Aug 10 14:20:02 2016
@@ -148,7 +148,8 @@ defm S_BITSET1_B32 : SOP1_32 <sop1<0x1d,
 defm S_BITSET1_B64 : SOP1_64_32 <sop1<0x1e, 0x1b>, "s_bitset1_b64", []>;
 defm S_GETPC_B64 : SOP1_64_0 <sop1<0x1f, 0x1c>, "s_getpc_b64", []>;
 
-let isTerminator = 1, isBranch = 1, isBarrier = 1 in {
+let isTerminator = 1, isBarrier = 1,
+    isBranch = 1, isIndirectBranch = 1 in {
 defm S_SETPC_B64 : SOP1_1 <sop1<0x20, 0x1d>, "s_setpc_b64", []>;
 }
 defm S_SWAPPC_B64 : SOP1_64 <sop1<0x21, 0x1e>, "s_swappc_b64", []>;