[lld] r278230 - [ELF][MIPS] Take into account combination of EF_MIPS_ARCH and EF_MIPS_MACH flags while checking ISA compatibility

Simon Atanasyan via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 10 08:06:45 PDT 2016


Author: atanasyan
Date: Wed Aug 10 10:06:45 2016
New Revision: 278230

URL: http://llvm.org/viewvc/llvm-project?rev=278230&view=rev
Log:
[ELF][MIPS] Take into account combination of EF_MIPS_ARCH and EF_MIPS_MACH flags while checking ISA compatibility

MIPS ISA encoded using two ELF flags: general architecture flag like
EF_MIPS_ARCH_32, EF_MIPS_ARCH_64R6 etc and optional machine variant flag
like EF_MIPS_MACH_4111, EF_MIPS_MACH_OCTEON3 etc. When we check
compatibility between two input files and deduce ELF flags for generated
output we need to take into account both of these flags.

Modified:
    lld/trunk/ELF/Mips.cpp
    lld/trunk/test/ELF/mips-elf-flags-err.s

Modified: lld/trunk/ELF/Mips.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Mips.cpp?rev=278230&r1=278229&r2=278230&view=diff
==============================================================================
--- lld/trunk/ELF/Mips.cpp (original)
+++ lld/trunk/ELF/Mips.cpp Wed Aug 10 10:06:45 2016
@@ -119,13 +119,33 @@ static uint32_t getPicFlags(ArrayRef<Fil
 
 static ArchTreeEdge ArchTree[] = {
     // MIPS32R6 and MIPS64R6 are not compatible with other extensions
+    // MIPS64R2 extensions.
+    {EF_MIPS_ARCH_64R2 | EF_MIPS_MACH_OCTEON3, EF_MIPS_ARCH_64R2},
+    {EF_MIPS_ARCH_64R2 | EF_MIPS_MACH_OCTEON2, EF_MIPS_ARCH_64R2},
+    {EF_MIPS_ARCH_64R2 | EF_MIPS_MACH_OCTEON, EF_MIPS_ARCH_64R2},
+    {EF_MIPS_ARCH_64R2 | EF_MIPS_MACH_LS3A, EF_MIPS_ARCH_64R2},
     // MIPS64 extensions.
+    {EF_MIPS_ARCH_64 | EF_MIPS_MACH_SB1, EF_MIPS_ARCH_64},
+    {EF_MIPS_ARCH_64 | EF_MIPS_MACH_XLR, EF_MIPS_ARCH_64},
     {EF_MIPS_ARCH_64R2, EF_MIPS_ARCH_64},
     // MIPS V extensions.
     {EF_MIPS_ARCH_64, EF_MIPS_ARCH_5},
+    // R5000 extensions.
+    {EF_MIPS_ARCH_4 | EF_MIPS_MACH_5500, EF_MIPS_ARCH_4 | EF_MIPS_MACH_5400},
     // MIPS IV extensions.
+    {EF_MIPS_ARCH_4 | EF_MIPS_MACH_5400, EF_MIPS_ARCH_4},
+    {EF_MIPS_ARCH_4 | EF_MIPS_MACH_9000, EF_MIPS_ARCH_4},
     {EF_MIPS_ARCH_5, EF_MIPS_ARCH_4},
+    // VR4100 extensions.
+    {EF_MIPS_ARCH_3 | EF_MIPS_MACH_4111, EF_MIPS_ARCH_3 | EF_MIPS_MACH_4100},
+    {EF_MIPS_ARCH_3 | EF_MIPS_MACH_4120, EF_MIPS_ARCH_3 | EF_MIPS_MACH_4100},
     // MIPS III extensions.
+    {EF_MIPS_ARCH_3 | EF_MIPS_MACH_4010, EF_MIPS_ARCH_3},
+    {EF_MIPS_ARCH_3 | EF_MIPS_MACH_4100, EF_MIPS_ARCH_3},
+    {EF_MIPS_ARCH_3 | EF_MIPS_MACH_4650, EF_MIPS_ARCH_3},
+    {EF_MIPS_ARCH_3 | EF_MIPS_MACH_5900, EF_MIPS_ARCH_3},
+    {EF_MIPS_ARCH_3 | EF_MIPS_MACH_LS2E, EF_MIPS_ARCH_3},
+    {EF_MIPS_ARCH_3 | EF_MIPS_MACH_LS2F, EF_MIPS_ARCH_3},
     {EF_MIPS_ARCH_4, EF_MIPS_ARCH_3},
     // MIPS32 extensions.
     {EF_MIPS_ARCH_32R2, EF_MIPS_ARCH_32},
@@ -133,6 +153,7 @@ static ArchTreeEdge ArchTree[] = {
     {EF_MIPS_ARCH_3, EF_MIPS_ARCH_2},
     {EF_MIPS_ARCH_32, EF_MIPS_ARCH_2},
     // MIPS I extensions.
+    {EF_MIPS_ARCH_1 | EF_MIPS_MACH_3900, EF_MIPS_ARCH_1},
     {EF_MIPS_ARCH_2, EF_MIPS_ARCH_1},
 };
 
@@ -183,10 +204,10 @@ static StringRef getArchName(uint32_t Fl
 }
 
 static uint32_t getArchFlags(ArrayRef<FileFlags> Files) {
-  uint32_t Ret = Files[0].Flags & EF_MIPS_ARCH;
+  uint32_t Ret = Files[0].Flags & (EF_MIPS_ARCH | EF_MIPS_MACH);
 
   for (const FileFlags &F : Files.slice(1)) {
-    uint32_t New = F.Flags & EF_MIPS_ARCH;
+    uint32_t New = F.Flags & (EF_MIPS_ARCH | EF_MIPS_MACH);
 
     // Check ISA compatibility.
     if (isArchMatched(New, Ret))

Modified: lld/trunk/test/ELF/mips-elf-flags-err.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/mips-elf-flags-err.s?rev=278230&r1=278229&r2=278230&view=diff
==============================================================================
--- lld/trunk/test/ELF/mips-elf-flags-err.s (original)
+++ lld/trunk/test/ELF/mips-elf-flags-err.s Wed Aug 10 10:06:45 2016
@@ -15,6 +15,15 @@
 # RUN:         -mcpu=mips32r6 %s -o %t2.o
 # RUN: not ld.lld %t1.o %t2.o -o %t.exe 2>&1 | FileCheck -check-prefix=R1R6 %s
 
+# Check that lld take in account EF_MIPS_MACH_XXX ISA flags
+
+# RUN: llvm-mc -filetype=obj -triple=mips64-unknown-linux \
+# RUN:         -mcpu=mips64 %S/Inputs/mips-dynamic.s -o %t1.o
+# RUN: llvm-mc -filetype=obj -triple=mips64-unknown-linux \
+# RUN:         -mcpu=octeon %s -o %t2.o
+# RUN: ld.lld %t1.o %t2.o -o %t.exe
+# RUN: llvm-readobj -h %t.exe | FileCheck -check-prefix=OCTEON %s
+
 # Check that lld does not allow to link incompatible ABIs.
 
 # RUN: llvm-mc -filetype=obj -triple=mips-unknown-linux \
@@ -47,6 +56,13 @@ __start:
 
 # R1R6: target ISA 'mips32' is incompatible with 'mips32r6': {{.*}}mips-elf-flags-err.s.tmp2.o
 
+# OCTEON:      Flags [
+# OCTEON-NEXT:   EF_MIPS_ARCH_64R2
+# OCTEON-NEXT:   EF_MIPS_CPIC
+# OCTEON-NEXT:   EF_MIPS_MACH_OCTEON
+# OCTEON-NEXT:   EF_MIPS_PIC
+# OCTEON-NEXT: ]
+
 # N32O32: target ABI 'n32' is incompatible with 'o32': {{.*}}mips-elf-flags-err.s.tmp2.o
 
 # NAN: target -mnan=2008 is incompatible with -mnan=legacy: {{.*}}mips-elf-flags-err.s.tmp2.o




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