[PATCH] D23313: X86: FMA intrinsic + FNEG - sequence optimization

[Elena Demikhovsky via llvm-commits]

delena added a comment.

In https://reviews.llvm.org/D23313#511156, @RKSimon wrote:

> Instead of adding the forceLegalization approach why can't we just expand combineFMA to support the negation of inputs for all X86ISD FMA/AVX512 opcodes? A helper function might be necessary (to detect FNEG or FXOR signbit-flipping) but that should be all.


When we receive X86ISD FMA/AVX512 opcodes, FNEG does not exist any more. It is lowered to FXOR and this is the problem. Analysis of FXOR requires visiting load and visiting constant pool and checking the value of the integer constant under the FP load.
That's why I want to delay FNEG legalization.


Repository:
  rL LLVM

https://reviews.llvm.org/D23313