[PATCH] D21571: [AArch64] Avoid generating indexed vector instructions for Exynos

Abderrazek Zaafrani via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 1 16:35:29 PDT 2016


az added inline comments.

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Comment at: llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll:2
@@ -1,2 +1,3 @@
 ; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon -fp-contract=fast | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon -fp-contract=fast -mcpu=exynos-m1 | FileCheck --check-prefix=EXYNOS %s
 
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It is not a feature anymore. It is now an optimization that is currently triggered for Exynos only.  


https://reviews.llvm.org/D21571





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