[llvm] r277198 - Fixed (incorrectly firing) MSVC unused variable warning

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 29 11:57:32 PDT 2016


Author: rksimon
Date: Fri Jul 29 13:57:32 2016
New Revision: 277198

URL: http://llvm.org/viewvc/llvm-project?rev=277198&view=rev
Log:
Fixed (incorrectly firing) MSVC unused variable warning

Modified:
    llvm/trunk/lib/CodeGen/MachinePipeliner.cpp

Modified: llvm/trunk/lib/CodeGen/MachinePipeliner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachinePipeliner.cpp?rev=277198&r1=277197&r2=277198&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachinePipeliner.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachinePipeliner.cpp Fri Jul 29 13:57:32 2016
@@ -3819,7 +3819,6 @@ bool SMSchedule::isLoopCarriedDefOfUse(S
 // different stage than the definition. The pipeliner does not handle
 // physical register values that may cross a basic block boundary.
 bool SMSchedule::isValidSchedule(SwingSchedulerDAG *SSD) {
-  const TargetRegisterInfo *TRI = ST.getRegisterInfo();
   for (int i = 0, e = SSD->SUnits.size(); i < e; ++i) {
     SUnit &SU = SSD->SUnits[i];
     if (!SU.hasPhysRegDefs)
@@ -3828,7 +3827,7 @@ bool SMSchedule::isValidSchedule(SwingSc
     assert(StageDef != -1 && "Instruction should have been scheduled.");
     for (auto &SI : SU.Succs)
       if (SI.isAssignedRegDep())
-        if (TRI->isPhysicalRegister(SI.getReg()))
+        if (ST.getRegisterInfo()->isPhysicalRegister(SI.getReg()))
           if (stageScheduled(SI.getSUnit()) != StageDef)
             return false;
   }




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