[PATCH] D22933: DAG: avoid truncating a sign extended operand when test equality against zero

[Weiming Zhao via llvm-commits]

weimingz added inline comments.

================
Comment at: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:956
@@ -955,3 +955,3 @@
         OpR->getOpcode() == ISD::AssertSext &&
         cast<VTSDNode>(OpR->getOperand(1))->getVT() == NewRHS.getValueType()) {
       NewLHS = OpL;
----------------
eli.friedman wrote:
> This check is now unnecessary.
Yes. I was thinking the same. But my concern is  computeNumSignBits only gives its best knowledge by looking into no more than 6 steps. Will it miss some cases?


Repository:
  rL LLVM

https://reviews.llvm.org/D22933