[PATCH] D22867: [LV] Untangle the concepts of uniform and scalar

Wei Mi via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 29 08:46:52 PDT 2016


> - Moving the induction variable logic out of collectValuesToIgnore. IVs and their updates will now only be placed in VecValuesToIgnore if they're uniform. I believe the existing code was there because the IV scalarization logic needed VecValuesToIgnore to decide if a scalar IV was desired. But now, with a clear distinction between uniform and scalar, I think we should move this out. The IVs are handled by isScalarAfterVectorization now.

Matt, however, not just IV scalarization logic needs
VecValuesToIgnore, calculateRegisterUsage to compute vector register
pressure also needs it. Because IV's live range always spreads across
the whole loop body, and it is often promoted to i64 type, it is
important to include IV in VecValuesToIgnore if there is no vector
version IV.

Thanks,
Wei.


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