[llvm] r277136 - Re-commit: [mips][fastisel] Handle 0-4 arguments without SelectionDAG.
Daniel Sanders via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 29 05:27:29 PDT 2016
Author: dsanders
Date: Fri Jul 29 07:27:28 2016
New Revision: 277136
URL: http://llvm.org/viewvc/llvm-project?rev=277136&view=rev
Log:
Re-commit: [mips][fastisel] Handle 0-4 arguments without SelectionDAG.
Summary:
Implements fastLowerArguments() to avoid the need to fall back on
SelectionDAG for 0-4 argument functions that don't do tricky things like
passing double in a pair of i32's.
This allows us to move all except one test to -fast-isel-abort=3. The
remaining one has function prototypes of the form 'i32 (i32, double, double)'
which requires floats to be passed in GPR's.
The previous commit had an uninitialized variable that caused the incoming
argument region to have undefined size. This has been fixed.
Reviewers: sdardis
Subscribers: dsanders, llvm-commits, sdardis
Differential Revision: https://reviews.llvm.org/D22680
Modified:
llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
llvm/trunk/test/CodeGen/Mips/Fast-ISel/br1.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/bswap1.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/callabi.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/div1.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/fastalloca.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpext.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpintconv.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/fptrunc.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/icmpa.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstore2.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstoreconv.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/logopm.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/memtest1.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/nullvoid.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/overflt.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/rem1.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/retabi.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/shftopm.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestore.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorei.ll
Modified: llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsFastISel.cpp?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsFastISel.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsFastISel.cpp Fri Jul 29 07:27:28 2016
@@ -31,6 +31,9 @@
#include "llvm/IR/GlobalVariable.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Support/Debug.h"
+
+#define DEBUG_TYPE "mips-fastisel"
using namespace llvm;
@@ -95,6 +98,7 @@ class MipsFastISel final : public FastIS
// Convenience variables to avoid some queries.
LLVMContext *Context;
+ bool fastLowerArguments() override;
bool fastLowerCall(CallLoweringInfo &CLI) override;
bool fastLowerIntrinsicCall(const IntrinsicInst *II) override;
@@ -195,6 +199,9 @@ private:
bool processCallArgs(CallLoweringInfo &CLI, SmallVectorImpl<MVT> &ArgVTs,
unsigned &NumBytes);
bool finishCall(CallLoweringInfo &CLI, MVT RetVT, unsigned NumBytes);
+ const MipsABIInfo &getABI() const {
+ return static_cast<const MipsTargetMachine &>(TM).getABI();
+ }
public:
// Backend specific FastISel code.
@@ -208,8 +215,7 @@ public:
bool ISASupported = !Subtarget->hasMips32r6() &&
!Subtarget->inMicroMipsMode() && Subtarget->hasMips32();
TargetSupported =
- ISASupported && TM.isPositionIndependent() &&
- (static_cast<const MipsTargetMachine &>(TM).getABI().IsO32());
+ ISASupported && TM.isPositionIndependent() && getABI().IsO32();
UnsupportedFPMode = Subtarget->isFP64bit();
}
@@ -1249,6 +1255,156 @@ bool MipsFastISel::finishCall(CallLoweri
return true;
}
+bool MipsFastISel::fastLowerArguments() {
+ DEBUG(dbgs() << "fastLowerArguments\n");
+
+ if (!FuncInfo.CanLowerReturn) {
+ DEBUG(dbgs() << ".. gave up (!CanLowerReturn)\n");
+ return false;
+ }
+
+ const Function *F = FuncInfo.Fn;
+ if (F->isVarArg()) {
+ DEBUG(dbgs() << ".. gave up (varargs)\n");
+ return false;
+ }
+
+ CallingConv::ID CC = F->getCallingConv();
+ if (CC != CallingConv::C) {
+ DEBUG(dbgs() << ".. gave up (calling convention is not C)\n");
+ return false;
+ }
+
+ static const MCPhysReg GPR32ArgRegs[] = {Mips::A0, Mips::A1, Mips::A2,
+ Mips::A3};
+ static const MCPhysReg FGR32ArgRegs[] = {Mips::F12, Mips::F14};
+ static const MCPhysReg AFGR64ArgRegs[] = {Mips::D6, Mips::D7};
+
+ struct AllocatedReg {
+ const TargetRegisterClass *RC;
+ unsigned Reg;
+ AllocatedReg(const TargetRegisterClass *RC, unsigned Reg)
+ : RC(RC), Reg(Reg) {}
+ };
+
+ // Only handle simple cases. i.e. Up to four integer arguments.
+ // Supporting floating point significantly complicates things so we leave
+ // that out for now.
+ SmallVector<AllocatedReg, 4> Allocation;
+ unsigned Idx = 1;
+ bool HasAllocatedNonFGR = false;
+ for (const auto &FormalArg : F->args()) {
+ if (Idx > 4) {
+ DEBUG(dbgs() << ".. gave up (too many arguments)\n");
+ return false;
+ }
+
+ if (F->getAttributes().hasAttribute(Idx, Attribute::InReg) ||
+ F->getAttributes().hasAttribute(Idx, Attribute::StructRet) ||
+ F->getAttributes().hasAttribute(Idx, Attribute::ByVal)) {
+ DEBUG(dbgs() << ".. gave up (inreg, structret, byval)\n");
+ return false;
+ }
+
+ Type *ArgTy = FormalArg.getType();
+ if (ArgTy->isStructTy() || ArgTy->isArrayTy() || ArgTy->isVectorTy()) {
+ DEBUG(dbgs() << ".. gave up (struct, array, or vector)\n");
+ return false;
+ }
+
+ EVT ArgVT = TLI.getValueType(DL, ArgTy);
+ DEBUG(dbgs() << ".. " << (Idx - 1) << ": " << ArgVT.getEVTString() << "\n");
+ if (!ArgVT.isSimple()) {
+ DEBUG(dbgs() << ".. .. gave up (not a simple type)\n");
+ return false;
+ }
+
+ switch (ArgVT.getSimpleVT().SimpleTy) {
+ case MVT::i1:
+ case MVT::i8:
+ case MVT::i16:
+ if (!F->getAttributes().hasAttribute(Idx, Attribute::SExt) &&
+ !F->getAttributes().hasAttribute(Idx, Attribute::ZExt)) {
+ // It must be any extend, this shouldn't happen for clang-generated IR
+ // so just fall back on SelectionDAG.
+ DEBUG(dbgs() << ".. .. gave up (i8/i16 arg is not extended)\n");
+ return false;
+ }
+ DEBUG(dbgs() << ".. .. GPR32(" << GPR32ArgRegs[Idx - 1] << ")\n");
+ Allocation.emplace_back(&Mips::GPR32RegClass, GPR32ArgRegs[Idx - 1]);
+ HasAllocatedNonFGR = true;
+ break;
+
+ case MVT::i32:
+ if (F->getAttributes().hasAttribute(Idx, Attribute::ZExt)) {
+ // The O32 ABI does not permit a zero-extended i32.
+ DEBUG(dbgs() << ".. .. gave up (i32 arg is zero extended)\n");
+ return false;
+ }
+ DEBUG(dbgs() << ".. .. GPR32(" << GPR32ArgRegs[Idx - 1] << ")\n");
+ Allocation.emplace_back(&Mips::GPR32RegClass, GPR32ArgRegs[Idx - 1]);
+ HasAllocatedNonFGR = true;
+ break;
+
+ case MVT::f32:
+ if (Idx > 2 || HasAllocatedNonFGR) {
+ DEBUG(dbgs() << ".. .. gave up (f32 arg needed i32)\n");
+ return false;
+ } else {
+ DEBUG(dbgs() << ".. .. FGR32(" << FGR32ArgRegs[Idx - 1] << ")\n");
+ Allocation.emplace_back(&Mips::FGR32RegClass, FGR32ArgRegs[Idx - 1]);
+ }
+ break;
+
+ case MVT::f64:
+ if (Idx > 2 || HasAllocatedNonFGR) {
+ DEBUG(dbgs() << ".. .. gave up (f64 arg needed 2xi32)\n");
+ return false;
+ } else {
+ DEBUG(dbgs() << ".. .. AFGR64(" << AFGR64ArgRegs[Idx - 1] << ")\n");
+ Allocation.emplace_back(&Mips::AFGR64RegClass, AFGR64ArgRegs[Idx - 1]);
+ }
+ break;
+
+ default:
+ DEBUG(dbgs() << ".. .. gave up (unknown type)\n");
+ return false;
+ }
+
+ ++Idx;
+ }
+
+ Idx = 0;
+ for (const auto &FormalArg : F->args()) {
+ unsigned SrcReg = Allocation[Idx].Reg;
+ unsigned DstReg = FuncInfo.MF->addLiveIn(SrcReg, Allocation[Idx].RC);
+ // FIXME: Unfortunately it's necessary to emit a copy from the livein copy.
+ // Without this, EmitLiveInCopies may eliminate the livein if its only
+ // use is a bitcast (which isn't turned into an instruction).
+ unsigned ResultReg = createResultReg(Allocation[Idx].RC);
+ BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
+ TII.get(TargetOpcode::COPY), ResultReg)
+ .addReg(DstReg, getKillRegState(true));
+ updateValueMap(&FormalArg, ResultReg);
+ ++Idx;
+ }
+
+ // Calculate the size of the incoming arguments area.
+ // We currently reject all the cases where this would be non-zero.
+ unsigned IncomingArgSizeInBytes = 0;
+
+ // Account for the reserved argument area on ABI's that have one (O32).
+ // It seems strange to do this on the caller side but it's necessary in
+ // SelectionDAG's implementation.
+ IncomingArgSizeInBytes = std::min(getABI().GetCalleeAllocdArgSizeInBytes(CC),
+ IncomingArgSizeInBytes);
+
+ MF->getInfo<MipsFunctionInfo>()->setFormalArgInfo(IncomingArgSizeInBytes,
+ false);
+
+ return true;
+}
+
bool MipsFastISel::fastLowerCall(CallLoweringInfo &CLI) {
if (!TargetSupported)
return false;
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/br1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/br1.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/br1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/br1.ll Fri Jul 29 07:27:28 2016
@@ -1,6 +1,6 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@b = global i32 1, align 4
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/bswap1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/bswap1.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/bswap1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/bswap1.ll Fri Jul 29 07:27:28 2016
@@ -1,8 +1,8 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \
-; RUN: -fast-isel-abort=1 | FileCheck %s \
+; RUN: -fast-isel-abort=3 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=32R1
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
-; RUN: -fast-isel-abort=1 | FileCheck %s \
+; RUN: -fast-isel-abort=3 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=32R2
@a = global i16 -21829, align 2
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/callabi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/callabi.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/callabi.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/callabi.ll Fri Jul 29 07:27:28 2016
@@ -1,8 +1,8 @@
; RUN: llc -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \
-; RUN: -fast-isel-abort=1 -verify-machineinstrs < %s | \
+; RUN: -fast-isel-abort=3 -verify-machineinstrs < %s | \
; RUN: FileCheck %s -check-prefixes=ALL,32R1
; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
-; RUN: -fast-isel-abort=1 -verify-machineinstrs < %s | \
+; RUN: -fast-isel-abort=3 -verify-machineinstrs < %s | \
; RUN: FileCheck %s -check-prefixes=ALL,32R2
declare void @xb(i8)
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll Fri Jul 29 07:27:28 2016
@@ -1,7 +1,7 @@
; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=pic \
-; RUN: -fast-isel=true -fast-isel-abort=1 < %s | FileCheck %s
+; RUN: -fast-isel=true -fast-isel-abort=3 < %s | FileCheck %s
; RUN: llc -march=mipsel -mcpu=mips32r2 -relocation-model=pic \
-; RUN: -fast-isel=true -fast-isel-abort=1 < %s | FileCheck %s
+; RUN: -fast-isel=true -fast-isel-abort=3 < %s | FileCheck %s
@ARR = external global [10 x i32], align 4
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/div1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/div1.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/div1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/div1.ll Fri Jul 29 07:27:28 2016
@@ -1,7 +1,7 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \
-; RUN: -fast-isel-abort=1 | FileCheck %s
+; RUN: -fast-isel-abort=3 | FileCheck %s
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
-; RUN: -fast-isel-abort=1 | FileCheck %s
+; RUN: -fast-isel-abort=3 | FileCheck %s
@sj = global i32 200000, align 4
@sk = global i32 -47, align 4
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/fastalloca.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/fastalloca.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/fastalloca.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/fastalloca.ll Fri Jul 29 07:27:28 2016
@@ -1,4 +1,4 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s -verify-machineinstrs | FileCheck %s
%struct.x = type { i32 }
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll Fri Jul 29 07:27:28 2016
@@ -1,6 +1,6 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: -verify-machineinstrs < %s | FileCheck %s
@f1 = common global float 0.000000e+00, align 4
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpext.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpext.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpext.ll Fri Jul 29 07:27:28 2016
@@ -1,6 +1,6 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@f = global float 0x40147E6B80000000, align 4
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpintconv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpintconv.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpintconv.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpintconv.ll Fri Jul 29 07:27:28 2016
@@ -1,6 +1,6 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/fptrunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/fptrunc.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/fptrunc.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/fptrunc.ll Fri Jul 29 07:27:28 2016
@@ -1,6 +1,6 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@d = global double 0x40147E6B74DF0446, align 8
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/icmpa.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/icmpa.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/icmpa.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/icmpa.ll Fri Jul 29 07:27:28 2016
@@ -1,6 +1,6 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@c = global i32 4, align 4
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstore2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstore2.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstore2.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstore2.ll Fri Jul 29 07:27:28 2016
@@ -4,9 +4,9 @@ target triple = "mips--linux-gnu"
@c2 = common global i8 0, align 1
@c1 = common global i8 0, align 1
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@s2 = common global i16 0, align 2
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstoreconv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstoreconv.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstoreconv.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstoreconv.ll Fri Jul 29 07:27:28 2016
@@ -1,10 +1,10 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s -check-prefix=mips32r2
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s -check-prefix=mips32
@b2 = global i8 0, align 1
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll Fri Jul 29 07:27:28 2016
@@ -1,6 +1,6 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@.str = private unnamed_addr constant [6 x i8] c"hello\00", align 1
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/logopm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/logopm.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/logopm.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/logopm.ll Fri Jul 29 07:27:28 2016
@@ -1,5 +1,5 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 < %s | FileCheck %s
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 < %s | FileCheck %s
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 < %s | FileCheck %s
@ub1 = common global i8 0, align 1
@ub2 = common global i8 0, align 1
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/memtest1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/memtest1.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/memtest1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/memtest1.ll Fri Jul 29 07:27:28 2016
@@ -1,8 +1,8 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \
-; RUN: -fast-isel-abort=1 -verify-machineinstrs | FileCheck %s \
+; RUN: -fast-isel-abort=3 -verify-machineinstrs | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=32R1
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
-; RUN: -fast-isel-abort=1 -verify-machineinstrs | FileCheck %s \
+; RUN: -fast-isel-abort=3 -verify-machineinstrs | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=32R2
@str = private unnamed_addr constant [12 x i8] c"hello there\00", align 1
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/nullvoid.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/nullvoid.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/nullvoid.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/nullvoid.ll Fri Jul 29 07:27:28 2016
@@ -1,6 +1,6 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
; Function Attrs: nounwind
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/overflt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/overflt.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/overflt.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/overflt.ll Fri Jul 29 07:27:28 2016
@@ -1,6 +1,6 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@x = common global [128000 x float] zeroinitializer, align 4
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/rem1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/rem1.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/rem1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/rem1.ll Fri Jul 29 07:27:28 2016
@@ -1,7 +1,7 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \
-; RUN: -fast-isel-abort=1 | FileCheck %s
+; RUN: -fast-isel-abort=3 | FileCheck %s
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
-; RUN: -fast-isel-abort=1 | FileCheck %s
+; RUN: -fast-isel-abort=3 | FileCheck %s
@sj = global i32 200, align 4
@sk = global i32 -47, align 4
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/retabi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/retabi.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/retabi.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/retabi.ll Fri Jul 29 07:27:28 2016
@@ -1,4 +1,4 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
@i = global i32 75, align 4
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/shftopm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/shftopm.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/shftopm.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/shftopm.ll Fri Jul 29 07:27:28 2016
@@ -1,7 +1,7 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 \
-; RUN: -fast-isel-abort=1 -mcpu=mips32r2 < %s | FileCheck %s
+; RUN: -fast-isel-abort=3 -mcpu=mips32r2 < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 \
-; RUN: -fast-isel-abort=1 -mcpu=mips32 < %s | FileCheck %s
+; RUN: -fast-isel-abort=3 -mcpu=mips32 < %s | FileCheck %s
@s1 = global i16 -89, align 2
@s2 = global i16 4, align 2
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestore.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestore.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestore.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestore.ll Fri Jul 29 07:27:28 2016
@@ -1,6 +1,6 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@abcd = external global i32
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll Fri Jul 29 07:27:28 2016
@@ -1,10 +1,10 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s -check-prefix=mips32r2
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s -check-prefix=mips32
@f = common global float 0.000000e+00, align 4
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorei.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorei.ll?rev=277136&r1=277135&r2=277136&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorei.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorei.ll Fri Jul 29 07:27:28 2016
@@ -1,6 +1,6 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@ijk = external global i32
More information about the llvm-commits
mailing list