[PATCH] D22489: AMDGPU/SI: Implement readlane/readfirstlane intrinsics to expose the instructions.

[Changpeng Fang via llvm-commits]

cfang added a comment.

In https://reviews.llvm.org/D22489#497604, @nhaehnle wrote:

> Do you plan to add code to DivergenceAnalysis to recognize these intrinsics? We might eventually want to use a readfirstlane intrinsic from Mesa to hint when certain indices can be assumed to be uniform.
>
> (Right now, LLVM ends up deciding where to insert the readfirstlane in those cases, since they are situations where buffer resource descriptors are loaded which must end up in SGPRs anyway. By giving a readfirstlane hint, we could perhaps generate more efficient code.)


I do not have this plan right now. But we will definitely consider your suggestion.


https://reviews.llvm.org/D22489