[llvm] r277006 - [MIRParser] Accept unsized generic instructions.
Ahmed Bougacha via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 28 10:15:12 PDT 2016
Author: ab
Date: Thu Jul 28 12:15:12 2016
New Revision: 277006
URL: http://llvm.org/viewvc/llvm-project?rev=277006&view=rev
Log:
[MIRParser] Accept unsized generic instructions.
Since r276158, we require generic instructions to have a sized type.
G_BR doesn't; relax the restriction.
Added:
llvm/trunk/test/CodeGen/MIR/X86/generic-instr-type.mir
- copied, changed from r277003, llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir
Removed:
llvm/trunk/test/CodeGen/MIR/X86/generic-instr-type-error.mir
llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir
Modified:
llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
Modified: llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp?rev=277006&r1=277005&r2=277006&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp Thu Jul 28 12:15:12 2016
@@ -130,8 +130,7 @@ public:
bool parseIRConstant(StringRef::iterator Loc, StringRef Source,
const Constant *&C);
bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
- bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty,
- bool MustBeSized = true);
+ bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty);
bool parseTypedImmediateOperand(MachineOperand &Dest);
bool parseFPImmediateOperand(MachineOperand &Dest);
bool parseMBBReference(MachineBasicBlock *&MBB);
@@ -1039,11 +1038,8 @@ bool MIParser::parseIRConstant(StringRef
return false;
}
-bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty,
- bool MustBeSized) {
+bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
if (Token.is(MIToken::Identifier) && Token.stringValue() == "unsized") {
- if (MustBeSized)
- return error(Loc, "expected pN, sN or <N x sM> for sized GlobalISel type");
lex();
Ty = LLT::unsized();
return false;
Removed: llvm/trunk/test/CodeGen/MIR/X86/generic-instr-type-error.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/generic-instr-type-error.mir?rev=277005&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/generic-instr-type-error.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/generic-instr-type-error.mir (removed)
@@ -1,15 +0,0 @@
-# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
-# This test ensures that the MIR parser report an error for
-# opaque types used on generic instruction.
-
----
-name: bar
-isSSA: true
-registers:
- - { id: 0, class: gr32 }
-body: |
- bb.0.entry:
- liveins: %edi
- ; CHECK: [[@LINE+1]]:16: expected pN, sN or <N x sM> for sized GlobalISel type
- %0 = G_ADD unsized %edi, %edi
-...
Copied: llvm/trunk/test/CodeGen/MIR/X86/generic-instr-type.mir (from r277003, llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/generic-instr-type.mir?p2=llvm/trunk/test/CodeGen/MIR/X86/generic-instr-type.mir&p1=llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir&r1=277003&r2=277006&rev=277006&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/generic-instr-type.mir Thu Jul 28 12:15:12 2016
@@ -1,22 +1,23 @@
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# REQUIRES: global-isel
-# This test ensures that the MIR parser parses generic virtual
-# register definitions correctly.
+# Test that the MIR parser parses types on generic instructions correctly.
--- |
- ; ModuleID = 'generic-virtual-registers-type-error.mir'
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
%type_alias = type <2 x i32>
%structure_alias = type { i32, i16 }
- define void @bar() {
- entry:
+ define void @test_vregs() {
+ ret void
+ }
+
+ define void @test_unsized() {
ret void
}
...
---
-name: bar
+name: test_vregs
isSSA: true
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: _ }
@@ -31,7 +32,7 @@ registers:
- { id: 3, class: _ }
- { id: 4, class: _ }
body: |
- bb.0.entry:
+ bb.0:
liveins: %edi
; CHECK: %0(32) = G_ADD s32 %edi
%0(32) = G_ADD s32 %edi, %edi
@@ -46,3 +47,14 @@ body: |
; CHECK: %4(48) = G_ADD s48 %edi
%4(48) = G_ADD s48 %edi, %edi
...
+
+---
+name: test_unsized
+isSSA: true
+body: |
+ bb.0:
+ successors: %bb.0
+
+ ; CHECK: G_BR unsized %bb.0
+ G_BR unsized %bb.0
+...
Removed: llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir?rev=277005&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir (removed)
@@ -1,48 +0,0 @@
-# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
-# REQUIRES: global-isel
-# This test ensures that the MIR parser parses generic virtual
-# register definitions correctly.
-
---- |
- ; ModuleID = 'generic-virtual-registers-type-error.mir'
- target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
- %type_alias = type <2 x i32>
- %structure_alias = type { i32, i16 }
- define void @bar() {
- entry:
- ret void
- }
-
-...
-
----
-name: bar
-isSSA: true
-# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: _ }
-# CHECK-NEXT: - { id: 1, class: _ }
-# CHECK-NEXT: - { id: 2, class: _ }
-# CHECK-NEXT: - { id: 3, class: _ }
-# CHECK-NEXT: - { id: 4, class: _ }
-registers:
- - { id: 0, class: _ }
- - { id: 1, class: _ }
- - { id: 2, class: _ }
- - { id: 3, class: _ }
- - { id: 4, class: _ }
-body: |
- bb.0.entry:
- liveins: %edi
- ; CHECK: %0(32) = G_ADD s32 %edi
- %0(32) = G_ADD s32 %edi, %edi
- ; CHECK: %1(64) = G_ADD <2 x s32> %edi
- %1(64) = G_ADD <2 x s32> %edi, %edi
- ; CHECK: %2(64) = G_ADD s64 %edi
- %2(64) = G_ADD s64 %edi, %edi
- ; G_ADD is actually not a valid operand for structure type,
- ; but that is the only one we have for now for testing.
- ; CHECK: %3(64) = G_ADD s64 %edi
- %3(64) = G_ADD s64 %edi, %edi
- ; CHECK: %4(48) = G_ADD s48 %edi
- %4(48) = G_ADD s48 %edi, %edi
-...
More information about the llvm-commits
mailing list