[PATCH] D22489: AMDGPU/SI: Implement readlane/readfirstlane intrinsics to expose the instructions.

[Tom Stellard via llvm-commits]

tstellarAMD added inline comments.

================
Comment at: lib/Target/AMDGPU/SIInstructions.td:1225
@@ -1224,3 +1224,3 @@
   "v_readfirstlane_b32 $vdst, $src0",
-  []
+  [(set SReg_32:$vdst, (int_amdgcn_readfirstlane VM0_32:$src0))]
 > {
----------------
You should use the type in the pattern rather than the register class.

================
Comment at: lib/Target/AMDGPU/SIInstructions.td:1598
@@ -1598,1 +1597,3 @@
+  "v_readlane_b32 $vdst, $src0, $src1",
+  [(set SReg_32:$vdst, (int_amdgcn_readlane VM0_32:$src0, SCSrc_32:$src1))]
 >;
----------------
Same here.

================
Comment at: lib/Target/AMDGPU/SIInstructions.td:2361
@@ -2359,2 +2360,3 @@
 
+
 //===----------------------------------------------------------------------===//
----------------
Extra whitespace.


https://reviews.llvm.org/D22489